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Merge pull request #1170 from dbabokin/v190_docs

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v1.9.0
This commit is contained in:
Dmitry Babokin
2016-02-12 18:36:29 +03:00
parent 1c0f0920f9 e47c9152ec
commit 89dfbf2125
10 changed files with 73 additions and 16 deletions
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21
docs/ReleaseNotes.txt
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@@ -1,3 +1,24 @@
=== v1.9.0 === (12 Feb 2016)
An ISPC release with AVX512 (KNL flavor) support and a number of bug fixes,
based on fresh LLVM 3.8 backend.
For AVX512 two modes are supported - generic and native. For instructions on how
to use them, please refer to the wiki. Going forward we assume that native mode
is the primary way to get AVX512 support and that generic mode will be deprecated.
If you observe significantly better performance in generic mode, please report
it via github issues.
Starting this release we are shipping two versions on Windows:
(1) for VS2013 and earlier releases
(2) for VS2015 and newer releases
The reason for doing this is the redesigned C run-time library in VS.
An implementation of "print" ISPC standard library function relies on C runtime
library, which has changed. If you are not using "print" function in your code,
you are safe to use either version.
A new options was introduced to improve debugging: --no-omit-frame-pointer.
=== v1.8.2 === (29 May 2015)
An ISPC update with several important stability fixes and an experimental

44
docs/ispc.rst
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@@ -52,6 +52,7 @@ Contents:
+ `Updating ISPC Programs For Changes In ISPC 1.6.0`_
+ `Updating ISPC Programs For Changes In ISPC 1.7.0`_
+ `Updating ISPC Programs For Changes In ISPC 1.8.2`_
+ `Updating ISPC Programs For Changes In ISPC 1.9.0`_
* `Getting Started with ISPC`_
@@ -63,7 +64,8 @@ Contents:
+ `Basic Command-line Options`_
+ `Selecting The Compilation Target`_
+ `Generating Generic C++ Output`_
+ `Compiling For The Intel® Xeon Phi™ Architecture`_
+ `Compiling For The Intel® Xeon Phi™ Architecture (codename Knights Corner)`_
+ `Compiling For The Intel® Xeon Phi™ Architecture (codename Knights Landing)`_
+ `Selecting 32 or 64 Bit Addressing`_
+ `The Preprocessor`_
+ `Debugging`_
@@ -337,6 +339,12 @@ older versions. Though you may want be aware of the following:
may use uniform structures and pointers to uniform types as return types in
export functions in multi-target compilation.
Updating ISPC Programs For Changes In ISPC 1.9.0
------------------------------------------------
The release doesn't contains language changes, which may affect compatibility with
older versions. It introduces new AVX512 target: avx512knl-i32x16.
Getting Started with ISPC
=========================
@@ -563,16 +571,17 @@ a mask size of 32 bits, and a gang size of 16.
The following target ISAs are supported:
============ ==========================================
============ =========================================================
Target Description
------------ ------------------------------------------
------------ ---------------------------------------------------------
avx, avx1 AVX (2010-2011 era Intel CPUs)
avx1.1 AVX 1.1 (2012 era "Ivybridge" Intel CPUs)
avx2 AVX 2 target (2013- Intel "Haswell" CPUs)
avx512knl AVX 512 target (Xeon Phi chips codename Knights Landing)
neon ARM NEON
sse2 SSE2 (early 2000s era x86 CPUs)
sse4 SSE4 (generally 2008-2010 Intel CPUs)
============ ==========================================
============ =========================================================
Consult your CPU's manual for specifics on which vector instruction set it
supports.
@@ -682,11 +691,12 @@ C++ file; this can be used to easily include specific implementations of
the vector types and functions.
Compiling For The Intel® Xeon Phi™ Architecture
----------------------------------------------------------
Compiling For The Intel® Xeon Phi™ Architecture (codename Knights Corner)
--------------------------------------------------------------------------
``ispc`` has beta-level support for compiling for the many-core Intel®
Xeon Phi™ architecture (formerly, "Many Integrated Cores" / MIC).
Xeon Phi™ architecture (formerly, "Many Integrated Cores" / MIC, codename
Knights Corner).
This support is based on the "generic" C++ output, described in the previous
section.
@@ -745,6 +755,22 @@ If you do use the current version of ``ispc`` on Intel Xeon Phi™,
please let us know of any bugs or unexpected results. (Also, any
interesting results!).
Compiling For The Intel® Xeon Phi™ Architecture (codename Knights Landing)
---------------------------------------------------------------------------
``ispc`` starting from v1.9.0 has support for compiling for the second
generation of Intel® Xeon Phi™ architecture (codename Knights Landing).
Two compilation paths are supported - generic (similar to KNC support) and
native.
To compile using generic path, follow KNC instructions, but use knl.h, instead
of knc.h and use -xMIC-AVX512 for ICPC instead of -mmic.
To compile using native path, just set --target=avx512knl-i32x16.
Going forward, generic path will be deprecated, so using native target is
preferable way to get AVX512 support.
Selecting 32 or 64 Bit Addressing
---------------------------------
@@ -781,7 +807,7 @@ preprocessor runs:
* - ISPC
- 1
- Detecting that the ``ispc`` compiler is processing the file
* - ISPC_TARGET_{NEON_8,NEON_16,NEON_32,SSE2,SSE4,AVX,AVX11,AVX2,GENERIC}
* - ISPC_TARGET_{NEON_8,NEON_16,NEON_32,SSE2,SSE4,AVX,AVX11,AVX2,AVX512KNL,GENERIC}
- 1
- One of these will be set, depending on the compilation target.
* - ISPC_POINTER_SIZE
@@ -5131,7 +5157,7 @@ countries.
* Other names and brands may be claimed as the property of others.
Copyright(C) 2011-2015, Intel Corporation. All rights reserved.
Copyright(C) 2011-2016, Intel Corporation. All rights reserved.
Optimization Notice

10
docs/news.rst
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@@ -2,6 +2,16 @@
ispc News
=========
ispc 1.9.0 is Released
----------------------
An ``ispc`` release with AVX512 (KNL flavor) support and a number of bug fixes,
based on fresh LLVM 3.8 backend.
For more details, please check `Release Notes`_.
.. _Release Notes: https://github.com/ispc/ispc/blob/master/docs/ReleaseNotes.txt
ispc 1.8.2 is Released
----------------------

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docs/perfguide.rst
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@@ -786,7 +786,7 @@ countries.
* Other names and brands may be claimed as the property of others.
Copyright(C) 2011, Intel Corporation. All rights reserved.
Copyright(C) 2011-2016, Intel Corporation. All rights reserved.
Optimization Notice

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docs/template-news.txt
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@@ -57,7 +57,7 @@
%(body)s
</div>
<div class="clearfix"></div>
<div id="footer"> &copy; 2011-2015 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<div id="footer"> &copy; 2011-2016 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<!-- Please Do Not remove this link, thank u -->
</div>
</div>

2
docs/template-perf.txt
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@@ -57,7 +57,7 @@
%(body)s
</div>
<div class="clearfix"></div>
<div id="footer"> &copy; 2011-2015 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<div id="footer"> &copy; 2011-2016 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<!-- Please Do Not remove this link, thank u -->
</div>
</div>

2
docs/template.txt
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@@ -57,7 +57,7 @@
%(body)s
</div>
<div class="clearfix"></div>
<div id="footer"> &copy; 2011-2015 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<div id="footer"> &copy; 2011-2016 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<!-- Please Do Not remove this link, thank u -->
</div>
</div>

2
doxygen.cfg
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@@ -31,7 +31,7 @@ PROJECT_NAME = "Intel SPMD Program Compiler"
# This could be handy for archiving the generated documentation or
# if some version control system is used.
PROJECT_NUMBER = 1.8.3dev
PROJECT_NUMBER = 1.9.0
# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
# base path where the generated documentation will be put.

2
ispc.cpp
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@@ -1217,7 +1217,7 @@ Target::ISAToString(ISA isa) {
return "avx2";
#if ISPC_LLVM_VERSION >= ISPC_LLVM_3_7 // LLVM 3.7+
case Target::KNL_AVX512:
return "avx512knl-i32x16";
return "avx512knl";
#endif
case Target::SKX:
return "skx";

2
ispc_version.h
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@@ -38,7 +38,7 @@
#ifndef ISPC_VERSION_H
#define ISPC_VERSION_H
#define ISPC_VERSION "1.8.3dev"
#define ISPC_VERSION "1.9.0"
#include "llvm/Config/llvm-config.h"
#define ISPC_LLVM_VERSION ( LLVM_VERSION_MAJOR * 10000 + LLVM_VERSION_MINOR * 100 )