Merge pull request #1221 from dbabokin/191

1.9.1 release
This commit is contained in:
Dmitry Babokin
2016-07-08 14:13:52 +03:00
committed by GitHub
6 changed files with 31 additions and 3 deletions

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@@ -1,3 +1,11 @@
=== v1.9.1 === (8 July 2016)
An ISPC update with new native AVX512 target for future Xeon CPUs and
improvements for debugging, including new switch --dwarf-version to support
debugging on old systems.
The release is based on patched version LLVM 3.8.
=== v1.9.0 === (12 Feb 2016)
An ISPC release with AVX512 (KNL flavor) support and a number of bug fixes,

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@@ -53,6 +53,7 @@ Contents:
+ `Updating ISPC Programs For Changes In ISPC 1.7.0`_
+ `Updating ISPC Programs For Changes In ISPC 1.8.2`_
+ `Updating ISPC Programs For Changes In ISPC 1.9.0`_
+ `Updating ISPC Programs For Changes In ISPC 1.9.1`_
* `Getting Started with ISPC`_
@@ -345,6 +346,12 @@ Updating ISPC Programs For Changes In ISPC 1.9.0
The release doesn't contains language changes, which may affect compatibility with
older versions. It introduces new AVX512 target: avx512knl-i32x16.
Updating ISPC Programs For Changes In ISPC 1.9.1
------------------------------------------------
The release doesn't contains language changes, which may affect compatibility with
older versions. It introduces new AVX512 target: avx512skx-i32x16.
Getting Started with ISPC
=========================
@@ -578,6 +585,7 @@ avx, avx1 AVX (2010-2011 era Intel CPUs)
avx1.1 AVX 1.1 (2012 era "Ivybridge" Intel CPUs)
avx2 AVX 2 target (2013- Intel "Haswell" CPUs)
avx512knl AVX 512 target (Xeon Phi chips codename Knights Landing)
avx512skx AVX 512 target (future Xeon CPUs)
neon ARM NEON
sse2 SSE2 (early 2000s era x86 CPUs)
sse4 SSE4 (generally 2008-2010 Intel CPUs)
@@ -807,7 +815,7 @@ preprocessor runs:
* - ISPC
- 1
- Detecting that the ``ispc`` compiler is processing the file
* - ISPC_TARGET_{NEON_8,NEON_16,NEON_32,SSE2,SSE4,AVX,AVX11,AVX2,AVX512KNL,GENERIC}
* - ISPC_TARGET_{NEON_8, NEON_16, NEON_32, SSE2, SSE4, AVX, AVX11, AVX2, AVX512KNL, AVX512SKX, GENERIC}
- 1
- One of these will be set, depending on the compilation target.
* - ISPC_POINTER_SIZE

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@@ -2,6 +2,16 @@
ispc News
=========
ispc 1.9.1 is Released
----------------------
An ``ispc`` release with new native AVX512 target for future Xeon CPUs and
improvements for debugging. Release is based on patched version LLVM 3.8 backend.
For more details, please check `Release Notes`_.
.. _Release Notes: https://github.com/ispc/ispc/blob/master/docs/ReleaseNotes.txt
ispc 1.9.0 is Released
----------------------

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@@ -31,7 +31,7 @@ PROJECT_NAME = "Intel SPMD Program Compiler"
# This could be handy for archiving the generated documentation or
# if some version control system is used.
PROJECT_NUMBER = 1.9.1dev
PROJECT_NUMBER = 1.9.1
# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
# base path where the generated documentation will be put.

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@@ -1287,8 +1287,10 @@ Target::ISAToString(ISA isa) {
case Target::KNL_AVX512:
return "avx512knl";
#endif
#if ISPC_LLVM_VERSION >= ISPC_LLVM_3_8 // LLVM 3.8+
case Target::SKX_AVX512:
return "avx512skx";
#endif
case Target::GENERIC:
return "generic";
#ifdef ISPC_NVPTX_ENABLED

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@@ -38,7 +38,7 @@
#ifndef ISPC_VERSION_H
#define ISPC_VERSION_H
#define ISPC_VERSION "1.9.1dev"
#define ISPC_VERSION "1.9.1"
#include "llvm/Config/llvm-config.h"
#define ISPC_LLVM_VERSION ( LLVM_VERSION_MAJOR * 10000 + LLVM_VERSION_MINOR * 100 )