Initial support for ARM NEON on Cortex-A9 and A15 CPUs. All but ~10 tests
pass, and all examples compile and run correctly. Most of the examples
show a ~2x speedup on a single A15 core versus scalar code.
Current open issues/TODOs
- Code quality looks decent, but hasn't been carefully examined. Known
issues/opportunities for improvement include:
- fp32 vector divide is done as a series of scalar divides rather than
a vector divide (which I believe exists, but I may be mistaken.)
This is particularly harmful to examples/rt, which only runs ~1.5x
faster with ispc, likely due to long chains of scalar divides.
- The compiler isn't generating a vmin.f32 for e.g. the final scalar
min in reduce_min(); instead it's generating a compare and then a
select instruction (and similarly elsewhere).
- There are some additional FIXMEs in builtins/target-neon.ll that
include both a few pieces of missing functionality (e.g. rounding
doubles) as well as places that deserve attention for possible
code quality improvements.
- Currently only the "cortex-a9" and "cortex-15" CPU targets are
supported; LLVM supports many other ARM CPUs and ispc should provide
access to all of the ones that have NEON support (and aren't too
obscure.)
- ~5 of the reduce-* tests hit an assertion inside LLVM (unfortunately
only when the compiler runs on an ARM host, though).
- The Windows build hasn't been tested (though I've tried to update
ispc.vcxproj appropriately). It may just work, but will more likely
have various small issues.)
- Anything related to 64-bit ARM has seen no attention.
89 lines
2.5 KiB
Makefile
89 lines
2.5 KiB
Makefile
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TASK_CXX=../tasksys.cpp
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TASK_LIB=-lpthread
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TASK_OBJ=objs/tasksys.o
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CXX=g++
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CXXFLAGS=-Iobjs/ -O2
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CC=gcc
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CCFLAGS=-Iobjs/ -O2
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LIBS=-lm $(TASK_LIB) -lstdc++
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ISPC=ispc -O2 $(ISPC_FLAGS)
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ISPC_HEADER=objs/$(ISPC_SRC:.ispc=_ispc.h)
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ARCH:=$(shell uname -m | sed -e s/x86_64/x86/ -e s/arm.*/arm/ -e s/sa110/arm/)
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ifeq ($(ARCH),x86)
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ISPC_OBJS=$(addprefix objs/, $(ISPC_SRC:.ispc=)_ispc.o $(ISPC_SRC:.ispc=)_ispc_sse2.o \
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$(ISPC_SRC:.ispc=)_ispc_sse4.o $(ISPC_SRC:.ispc=)_ispc_avx.o)
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ISPC_TARGETS=$(ISPC_IA_TARGETS)
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ISPC_FLAGS += --arch=x86-64
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CXXFLAGS += -m64
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CCFLAGS += -m64
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else ifeq ($(ARCH),arm)
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ISPC_OBJS=$(addprefix objs/, $(ISPC_SRC:.ispc=_ispc.o))
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ISPC_TARGETS=$(ISPC_ARM_TARGETS)
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else
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$(error Unknown architecture $(ARCH) from uname -m)
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endif
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CPP_OBJS=$(addprefix objs/, $(CPP_SRC:.cpp=.o))
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CC_OBJS=$(addprefix objs/, $(CC_SRC:.c=.o))
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OBJS=$(CPP_OBJS) $(CC_OBJS) $(TASK_OBJ) $(ISPC_OBJS)
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default: $(EXAMPLE)
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all: $(EXAMPLE) $(EXAMPLE)-sse4 $(EXAMPLE)-generic16 $(EXAMPLE)-scalar
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.PHONY: dirs clean
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dirs:
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/bin/mkdir -p objs/
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objs/%.cpp objs/%.o objs/%.h: dirs
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clean:
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/bin/rm -rf objs *~ $(EXAMPLE) $(EXAMPLE)-sse4 $(EXAMPLE)-generic16
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$(EXAMPLE): $(OBJS)
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$(CXX) $(CXXFLAGS) -o $@ $^ $(LIBS)
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objs/%.o: %.cpp dirs $(ISPC_HEADER)
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$(CXX) $< $(CXXFLAGS) -c -o $@
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objs/%.o: %.c dirs $(ISPC_HEADER)
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$(CC) $< $(CCFLAGS) -c -o $@
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objs/%.o: ../%.cpp dirs
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$(CXX) $< $(CXXFLAGS) -c -o $@
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objs/$(EXAMPLE).o: objs/$(EXAMPLE)_ispc.h
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objs/%_ispc.h objs/%_ispc.o objs/%_ispc_sse2.o objs/%_ispc_sse4.o objs/%_ispc_avx.o: %.ispc
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$(ISPC) --target=$(ISPC_TARGETS) $< -o objs/$*_ispc.o -h objs/$*_ispc.h
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objs/$(ISPC_SRC:.ispc=)_sse4.cpp: $(ISPC_SRC)
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$(ISPC) $< -o $@ --target=generic-4 --emit-c++ --c++-include-file=sse4.h
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objs/$(ISPC_SRC:.ispc=)_sse4.o: objs/$(ISPC_SRC:.ispc=)_sse4.cpp
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$(CXX) -I../intrinsics -msse4.2 $< $(CXXFLAGS) -c -o $@
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$(EXAMPLE)-sse4: $(CPP_OBJS) objs/$(ISPC_SRC:.ispc=)_sse4.o
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$(CXX) $(CXXFLAGS) -o $@ $^ $(LIBS)
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objs/$(ISPC_SRC:.ispc=)_generic16.cpp: $(ISPC_SRC)
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$(ISPC) $< -o $@ --target=generic-16 --emit-c++ --c++-include-file=generic-16.h
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objs/$(ISPC_SRC:.ispc=)_generic16.o: objs/$(ISPC_SRC:.ispc=)_generic16.cpp
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$(CXX) -I../intrinsics $< $(CXXFLAGS) -c -o $@
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$(EXAMPLE)-generic16: $(CPP_OBJS) objs/$(ISPC_SRC:.ispc=)_generic16.o
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$(CXX) $(CXXFLAGS) -o $@ $^ $(LIBS)
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objs/$(ISPC_SRC:.ispc=)_scalar.o: $(ISPC_SRC)
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$(ISPC) $< -o $@ --target=generic-1
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$(EXAMPLE)-scalar: $(CPP_OBJS) objs/$(ISPC_SRC:.ispc=)_scalar.o
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$(CXX) $(CXXFLAGS) -o $@ $^ $(LIBS)
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