278 lines
9.3 KiB
LLVM
278 lines
9.3 KiB
LLVM
;; Copyright (c) 2010-2015, Intel Corporation
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;; All rights reserved.
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;;
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;; Redistribution and use in source and binary forms, with or without
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;; modification, are permitted provided that the following conditions are
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;; met:
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;;
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;; * Redistributions of source code must retain the above copyright
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;; notice, this list of conditions and the following disclaimer.
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;;
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;; * Redistributions in binary form must reproduce the above copyright
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;; notice, this list of conditions and the following disclaimer in the
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;; documentation and/or other materials provided with the distribution.
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;;
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;; * Neither the name of Intel Corporation nor the names of its
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;; contributors may be used to endorse or promote products derived from
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;; this software without specific prior written permission.
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;;
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;;
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;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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;; IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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;; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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;; PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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;; OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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;; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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;; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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;; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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;; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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;; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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;; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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ctlztz()
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define_prefetches()
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define_shuffles()
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aossoa()
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rdrand_decls()
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; rcp
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declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) nounwind readnone
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define float @__rcp_uniform_float(float) nounwind readonly alwaysinline {
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; do the rcpss call
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%vecval = insertelement <4 x float> undef, float %0, i32 0
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%call = call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %vecval)
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%scall = extractelement <4 x float> %call, i32 0
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; do one N-R iteration to improve precision, as above
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%v_iv = fmul float %0, %scall
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%two_minus = fsub float 2., %v_iv
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%iv_mul = fmul float %scall, %two_minus
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ret float %iv_mul
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; rsqrt
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declare <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float>) nounwind readnone
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define float @__rsqrt_uniform_float(float) nounwind readonly alwaysinline {
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; uniform float is = extract(__rsqrt_u(v), 0);
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%v = insertelement <4 x float> undef, float %0, i32 0
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%vis = call <4 x float> @llvm.x86.sse.rsqrt.ss(<4 x float> %v)
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%is = extractelement <4 x float> %vis, i32 0
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; Newton-Raphson iteration to improve precision
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; return 0.5 * is * (3. - (v * is) * is);
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%v_is = fmul float %0, %is
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%v_is_is = fmul float %v_is, %is
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%three_sub = fsub float 3., %v_is_is
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%is_mul = fmul float %is, %three_sub
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%half_scale = fmul float 0.5, %is_mul
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ret float %half_scale
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; sqrt
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declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone
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define float @__sqrt_uniform_float(float) nounwind readonly alwaysinline {
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sse_unary_scalar(ret, 4, float, @llvm.x86.sse.sqrt.ss, %0)
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ret float %ret
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; fast math mode
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declare void @llvm.x86.sse.stmxcsr(i8 *) nounwind
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declare void @llvm.x86.sse.ldmxcsr(i8 *) nounwind
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define void @__fastmath() nounwind alwaysinline {
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%ptr = alloca i32
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%ptr8 = bitcast i32 * %ptr to i8 *
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call void @llvm.x86.sse.stmxcsr(i8 * %ptr8)
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%oldval = load PTR_OP_ARGS(`i32 ') %ptr
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; turn on DAZ (64)/FTZ (32768) -> 32832
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%update = or i32 %oldval, 32832
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store i32 %update, i32 *%ptr
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call void @llvm.x86.sse.ldmxcsr(i8 * %ptr8)
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ret void
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; float min/max
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declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind readnone
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declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) nounwind readnone
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define float @__max_uniform_float(float, float) nounwind readonly alwaysinline {
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sse_binary_scalar(ret, 4, float, @llvm.x86.sse.max.ss, %0, %1)
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ret float %ret
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}
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define float @__min_uniform_float(float, float) nounwind readonly alwaysinline {
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sse_binary_scalar(ret, 4, float, @llvm.x86.sse.min.ss, %0, %1)
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ret float %ret
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; double precision sqrt
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declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone
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define double @__sqrt_uniform_double(double) nounwind alwaysinline {
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sse_unary_scalar(ret, 2, double, @llvm.x86.sse2.sqrt.sd, %0)
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ret double %ret
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; double precision min/max
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declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>) nounwind readnone
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declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>) nounwind readnone
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define double @__min_uniform_double(double, double) nounwind readnone {
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sse_binary_scalar(ret, 2, double, @llvm.x86.sse2.min.sd, %0, %1)
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ret double %ret
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}
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define double @__max_uniform_double(double, double) nounwind readnone {
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sse_binary_scalar(ret, 2, double, @llvm.x86.sse2.max.sd, %0, %1)
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ret double %ret
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; rounding
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;;
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;; There are not any rounding instructions in SSE2, so we have to emulate
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;; the functionality with multiple instructions...
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; The code for __round_* is the result of compiling the following source
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; code.
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;
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; export float Round(float x) {
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; unsigned int sign = signbits(x);
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; unsigned int ix = intbits(x);
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; ix ^= sign;
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; x = floatbits(ix);
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; x += 0x1.0p23f;
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; x -= 0x1.0p23f;
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; ix = intbits(x);
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; ix ^= sign;
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; x = floatbits(ix);
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; return x;
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;}
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define float @__round_uniform_float(float) nounwind readonly alwaysinline {
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%float_to_int_bitcast.i.i.i.i = bitcast float %0 to i32
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%bitop.i.i = and i32 %float_to_int_bitcast.i.i.i.i, -2147483648
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%bitop.i = xor i32 %bitop.i.i, %float_to_int_bitcast.i.i.i.i
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%int_to_float_bitcast.i.i40.i = bitcast i32 %bitop.i to float
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%binop.i = fadd float %int_to_float_bitcast.i.i40.i, 8.388608e+06
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%binop21.i = fadd float %binop.i, -8.388608e+06
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%float_to_int_bitcast.i.i.i = bitcast float %binop21.i to i32
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%bitop31.i = xor i32 %float_to_int_bitcast.i.i.i, %bitop.i.i
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%int_to_float_bitcast.i.i.i = bitcast i32 %bitop31.i to float
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ret float %int_to_float_bitcast.i.i.i
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}
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;; Similarly, for implementations of the __floor* functions below, we have the
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;; bitcode from compiling the following source code...
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;export float Floor(float x) {
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; float y = Round(x);
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; unsigned int cmp = y > x ? 0xffffffff : 0;
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; float delta = -1.f;
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; unsigned int idelta = intbits(delta);
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; idelta &= cmp;
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; delta = floatbits(idelta);
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; return y + delta;
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;}
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define float @__floor_uniform_float(float) nounwind readonly alwaysinline {
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%calltmp.i = tail call float @__round_uniform_float(float %0) nounwind
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%bincmp.i = fcmp ogt float %calltmp.i, %0
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%selectexpr.i = sext i1 %bincmp.i to i32
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%bitop.i = and i32 %selectexpr.i, -1082130432
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%int_to_float_bitcast.i.i.i = bitcast i32 %bitop.i to float
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%binop.i = fadd float %calltmp.i, %int_to_float_bitcast.i.i.i
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ret float %binop.i
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}
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;; And here is the code we compiled to get the __ceil* functions below
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;
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;export uniform float Ceil(uniform float x) {
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; uniform float y = Round(x);
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; uniform int yltx = y < x ? 0xffffffff : 0;
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; uniform float delta = 1.f;
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; uniform int idelta = intbits(delta);
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; idelta &= yltx;
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; delta = floatbits(idelta);
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; return y + delta;
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;}
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define float @__ceil_uniform_float(float) nounwind readonly alwaysinline {
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%calltmp.i = tail call float @__round_uniform_float(float %0) nounwind
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%bincmp.i = fcmp olt float %calltmp.i, %0
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%selectexpr.i = sext i1 %bincmp.i to i32
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%bitop.i = and i32 %selectexpr.i, 1065353216
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%int_to_float_bitcast.i.i.i = bitcast i32 %bitop.i to float
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%binop.i = fadd float %calltmp.i, %int_to_float_bitcast.i.i.i
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ret float %binop.i
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; rounding doubles
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declare double @round(double)
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declare double @floor(double)
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declare double @ceil(double)
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define double @__round_uniform_double(double) nounwind readonly alwaysinline {
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%r = call double @round(double %0)
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ret double %r
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}
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define double @__floor_uniform_double(double) nounwind readonly alwaysinline {
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%r = call double @floor(double %0)
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ret double %r
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}
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define double @__ceil_uniform_double(double) nounwind readonly alwaysinline {
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%r = call double @ceil(double %0)
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ret double %r
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; horizontal ops / reductions
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declare i32 @llvm.ctpop.i32(i32)
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declare i64 @llvm.ctpop.i64(i64)
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define i32 @__popcnt_int32(i32) nounwind readonly alwaysinline {
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%val = call i32 @llvm.ctpop.i32(i32 %0)
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ret i32 %val
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}
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define i64 @__popcnt_int64(i64) nounwind readnone alwaysinline {
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%val = call i64 @llvm.ctpop.i64(i64 %0)
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ret i64 %val
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; int8/int16 builtins
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define_avgs()
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declare_nvptx()
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