371 lines
16 KiB
LLVM
371 lines
16 KiB
LLVM
;; Copyright (c) 2010-2015, Intel Corporation
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;; All rights reserved.
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;;
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;; Redistribution and use in source and binary forms, with or without
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;; modification, are permitted provided that the following conditions are
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;; met:
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;;
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;; * Redistributions of source code must retain the above copyright
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;; notice, this list of conditions and the following disclaimer.
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;;
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;; * Redistributions in binary form must reproduce the above copyright
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;; notice, this list of conditions and the following disclaimer in the
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;; documentation and/or other materials provided with the distribution.
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;;
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;; * Neither the name of Intel Corporation nor the names of its
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;; contributors may be used to endorse or promote products derived from
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;; this software without specific prior written permission.
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;;
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;;
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;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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;; IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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;; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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;; PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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;; OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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;; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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;; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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;; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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;; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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;; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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;; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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define(`MASK',`i1')
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define(`HAVE_GATHER',`1')
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define(`HAVE_SCATTER',`1')
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include(`util.m4')
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stdlib_core()
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scans()
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reduce_equal(WIDTH)
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rdrand_definition()
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; broadcast/rotate/shuffle
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declare <WIDTH x float> @__smear_float(float) nounwind readnone
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declare <WIDTH x double> @__smear_double(double) nounwind readnone
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declare <WIDTH x i8> @__smear_i8(i8) nounwind readnone
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declare <WIDTH x i16> @__smear_i16(i16) nounwind readnone
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declare <WIDTH x i32> @__smear_i32(i32) nounwind readnone
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declare <WIDTH x i64> @__smear_i64(i64) nounwind readnone
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declare <WIDTH x float> @__setzero_float() nounwind readnone
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declare <WIDTH x double> @__setzero_double() nounwind readnone
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declare <WIDTH x i8> @__setzero_i8() nounwind readnone
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declare <WIDTH x i16> @__setzero_i16() nounwind readnone
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declare <WIDTH x i32> @__setzero_i32() nounwind readnone
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declare <WIDTH x i64> @__setzero_i64() nounwind readnone
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declare <WIDTH x float> @__undef_float() nounwind readnone
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declare <WIDTH x double> @__undef_double() nounwind readnone
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declare <WIDTH x i8> @__undef_i8() nounwind readnone
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declare <WIDTH x i16> @__undef_i16() nounwind readnone
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declare <WIDTH x i32> @__undef_i32() nounwind readnone
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declare <WIDTH x i64> @__undef_i64() nounwind readnone
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; shuffle
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define_shuffles()
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; aos/soa
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aossoa()
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; half conversion routines
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declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readnone
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; 0 is round nearest even
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declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readnone
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define <16 x float> @__half_to_float_varying(<16 x i16> %v) nounwind readnone {
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%r_0 = shufflevector <16 x i16> %v, <16 x i16> undef,
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<8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%vr_0 = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %r_0)
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%r_1 = shufflevector <16 x i16> %v, <16 x i16> undef,
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<8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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%vr_1 = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %r_1)
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%r = shufflevector <8 x float> %vr_0, <8 x float> %vr_1,
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<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7,
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i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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ret <16 x float> %r
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}
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define <16 x i16> @__float_to_half_varying(<16 x float> %v) nounwind readnone {
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%r_0 = shufflevector <16 x float> %v, <16 x float> undef,
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<8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%vr_0 = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %r_0, i32 0)
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%r_1 = shufflevector <16 x float> %v, <16 x float> undef,
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<8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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%vr_1 = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %r_1, i32 0)
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%r = shufflevector <8 x i16> %vr_0, <8 x i16> %vr_1,
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<16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7,
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i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
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ret <16 x i16> %r
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}
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define float @__half_to_float_uniform(i16 %v) nounwind readnone {
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%v1 = bitcast i16 %v to <1 x i16>
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%vv = shufflevector <1 x i16> %v1, <1 x i16> undef,
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<8 x i32> <i32 0, i32 undef, i32 undef, i32 undef,
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i32 undef, i32 undef, i32 undef, i32 undef>
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%rv = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %vv)
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%r = extractelement <8 x float> %rv, i32 0
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ret float %r
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}
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define i16 @__float_to_half_uniform(float %v) nounwind readnone {
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%v1 = bitcast float %v to <1 x float>
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%vv = shufflevector <1 x float> %v1, <1 x float> undef,
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<8 x i32> <i32 0, i32 undef, i32 undef, i32 undef,
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i32 undef, i32 undef, i32 undef, i32 undef>
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; round to nearest even
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%rv = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %vv, i32 0)
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%r = extractelement <8 x i16> %rv, i32 0
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ret i16 %r
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; math
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declare void @__fastmath() nounwind
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;; round/floor/ceil
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declare float @__round_uniform_float(float) nounwind readnone
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declare float @__floor_uniform_float(float) nounwind readnone
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declare float @__ceil_uniform_float(float) nounwind readnone
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declare double @__round_uniform_double(double) nounwind readnone
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declare double @__floor_uniform_double(double) nounwind readnone
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declare double @__ceil_uniform_double(double) nounwind readnone
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declare <WIDTH x float> @__round_varying_float(<WIDTH x float>) nounwind readnone
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declare <WIDTH x float> @__floor_varying_float(<WIDTH x float>) nounwind readnone
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declare <WIDTH x float> @__ceil_varying_float(<WIDTH x float>) nounwind readnone
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declare <WIDTH x double> @__round_varying_double(<WIDTH x double>) nounwind readnone
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declare <WIDTH x double> @__floor_varying_double(<WIDTH x double>) nounwind readnone
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declare <WIDTH x double> @__ceil_varying_double(<WIDTH x double>) nounwind readnone
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;; min/max
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int64minmax()
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declare float @__max_uniform_float(float, float) nounwind readnone
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declare float @__min_uniform_float(float, float) nounwind readnone
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declare i32 @__min_uniform_int32(i32, i32) nounwind readnone
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declare i32 @__max_uniform_int32(i32, i32) nounwind readnone
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declare i32 @__min_uniform_uint32(i32, i32) nounwind readnone
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declare i32 @__max_uniform_uint32(i32, i32) nounwind readnone
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declare double @__min_uniform_double(double, double) nounwind readnone
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declare double @__max_uniform_double(double, double) nounwind readnone
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declare <WIDTH x float> @__max_varying_float(<WIDTH x float>,
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<WIDTH x float>) nounwind readnone
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declare <WIDTH x float> @__min_varying_float(<WIDTH x float>,
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<WIDTH x float>) nounwind readnone
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declare <WIDTH x i32> @__min_varying_int32(<WIDTH x i32>, <WIDTH x i32>) nounwind readnone
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declare <WIDTH x i32> @__max_varying_int32(<WIDTH x i32>, <WIDTH x i32>) nounwind readnone
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declare <WIDTH x i32> @__min_varying_uint32(<WIDTH x i32>, <WIDTH x i32>) nounwind readnone
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declare <WIDTH x i32> @__max_varying_uint32(<WIDTH x i32>, <WIDTH x i32>) nounwind readnone
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declare <WIDTH x double> @__min_varying_double(<WIDTH x double>,
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<WIDTH x double>) nounwind readnone
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declare <WIDTH x double> @__max_varying_double(<WIDTH x double>,
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<WIDTH x double>) nounwind readnone
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;; sqrt/rsqrt/rcp
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declare float @__rsqrt_uniform_float(float) nounwind readnone
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declare float @__rcp_uniform_float(float) nounwind readnone
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declare float @__sqrt_uniform_float(float) nounwind readnone
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declare <WIDTH x float> @__rcp_varying_float(<WIDTH x float>) nounwind readnone
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declare <WIDTH x float> @__rsqrt_varying_float(<WIDTH x float>) nounwind readnone
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declare <WIDTH x float> @__sqrt_varying_float(<WIDTH x float>) nounwind readnone
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declare double @__sqrt_uniform_double(double) nounwind readnone
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declare <WIDTH x double> @__sqrt_varying_double(<WIDTH x double>) nounwind readnone
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;; bit ops
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declare i32 @__popcnt_int32(i32) nounwind readnone
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declare i64 @__popcnt_int64(i64) nounwind readnone
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ctlztz()
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; FIXME: need either to wire these up to the 8-wide SVML entrypoints,
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; or, use the macro to call the 4-wide ones twice with our 8-wide
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; vectors...
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;; svml
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include(`svml.m4')
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svml_stubs(float,f,WIDTH)
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svml_stubs(double,d,WIDTH)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; reductions
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declare i64 @__movmsk(<WIDTH x i1>) nounwind readnone
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declare i1 @__any(<WIDTH x i1>) nounwind readnone
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declare i1 @__all(<WIDTH x i1>) nounwind readnone
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declare i1 @__none(<WIDTH x i1>) nounwind readnone
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declare i16 @__reduce_add_int8(<WIDTH x i8>) nounwind readnone
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declare i32 @__reduce_add_int16(<WIDTH x i16>) nounwind readnone
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declare float @__reduce_add_float(<WIDTH x float>) nounwind readnone
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declare float @__reduce_min_float(<WIDTH x float>) nounwind readnone
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declare float @__reduce_max_float(<WIDTH x float>) nounwind readnone
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declare i64 @__reduce_add_int32(<WIDTH x i32>) nounwind readnone
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declare i32 @__reduce_min_int32(<WIDTH x i32>) nounwind readnone
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declare i32 @__reduce_max_int32(<WIDTH x i32>) nounwind readnone
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declare i32 @__reduce_min_uint32(<WIDTH x i32>) nounwind readnone
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declare i32 @__reduce_max_uint32(<WIDTH x i32>) nounwind readnone
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declare double @__reduce_add_double(<WIDTH x double>) nounwind readnone
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declare double @__reduce_min_double(<WIDTH x double>) nounwind readnone
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declare double @__reduce_max_double(<WIDTH x double>) nounwind readnone
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declare i64 @__reduce_add_int64(<WIDTH x i64>) nounwind readnone
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declare i64 @__reduce_min_int64(<WIDTH x i64>) nounwind readnone
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declare i64 @__reduce_max_int64(<WIDTH x i64>) nounwind readnone
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declare i64 @__reduce_min_uint64(<WIDTH x i64>) nounwind readnone
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declare i64 @__reduce_max_uint64(<WIDTH x i64>) nounwind readnone
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; unaligned loads/loads+broadcasts
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declare <WIDTH x i8> @__masked_load_i8(i8 * nocapture, <WIDTH x i1> %mask) nounwind readonly
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declare <WIDTH x i16> @__masked_load_i16(i8 * nocapture, <WIDTH x i1> %mask) nounwind readonly
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declare <WIDTH x i32> @__masked_load_i32(i8 * nocapture, <WIDTH x i1> %mask) nounwind readonly
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declare <WIDTH x i64> @__masked_load_i64(i8 * nocapture, <WIDTH x i1> %mask) nounwind readonly
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masked_load_float_double()
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gen_masked_store(i8)
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gen_masked_store(i16)
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gen_masked_store(i32)
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gen_masked_store(i64)
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define void @__masked_store_float(<WIDTH x float> * nocapture, <WIDTH x float>,
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<WIDTH x MASK>) nounwind alwaysinline {
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%ptr = bitcast <WIDTH x float> * %0 to <WIDTH x i32> *
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%val = bitcast <WIDTH x float> %1 to <WIDTH x i32>
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call void @__masked_store_i32(<WIDTH x i32> * %ptr, <WIDTH x i32> %val, <WIDTH x MASK> %2)
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ret void
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}
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define void @__masked_store_double(<WIDTH x double> * nocapture, <WIDTH x double>,
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<WIDTH x MASK>) nounwind alwaysinline {
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%ptr = bitcast <WIDTH x double> * %0 to <WIDTH x i64> *
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%val = bitcast <WIDTH x double> %1 to <WIDTH x i64>
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call void @__masked_store_i64(<WIDTH x i64> * %ptr, <WIDTH x i64> %val, <WIDTH x MASK> %2)
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ret void
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}
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define void @__masked_store_blend_i8(<WIDTH x i8>* nocapture, <WIDTH x i8>,
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<WIDTH x i1>) nounwind alwaysinline {
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%v = load PTR_OP_ARGS(`<WIDTH x i8> ') %0
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%v1 = select <WIDTH x i1> %2, <WIDTH x i8> %1, <WIDTH x i8> %v
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store <WIDTH x i8> %v1, <WIDTH x i8> * %0
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ret void
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}
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define void @__masked_store_blend_i16(<WIDTH x i16>* nocapture, <WIDTH x i16>,
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<WIDTH x i1>) nounwind alwaysinline {
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%v = load PTR_OP_ARGS(`<WIDTH x i16> ') %0
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%v1 = select <WIDTH x i1> %2, <WIDTH x i16> %1, <WIDTH x i16> %v
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store <WIDTH x i16> %v1, <WIDTH x i16> * %0
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ret void
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}
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define void @__masked_store_blend_i32(<WIDTH x i32>* nocapture, <WIDTH x i32>,
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<WIDTH x i1>) nounwind alwaysinline {
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%v = load PTR_OP_ARGS(`<WIDTH x i32> ') %0
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%v1 = select <WIDTH x i1> %2, <WIDTH x i32> %1, <WIDTH x i32> %v
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store <WIDTH x i32> %v1, <WIDTH x i32> * %0
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ret void
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}
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define void @__masked_store_blend_float(<WIDTH x float>* nocapture, <WIDTH x float>,
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<WIDTH x i1>) nounwind alwaysinline {
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%v = load PTR_OP_ARGS(`<WIDTH x float> ') %0
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%v1 = select <WIDTH x i1> %2, <WIDTH x float> %1, <WIDTH x float> %v
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store <WIDTH x float> %v1, <WIDTH x float> * %0
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ret void
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}
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define void @__masked_store_blend_i64(<WIDTH x i64>* nocapture,
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<WIDTH x i64>, <WIDTH x i1>) nounwind alwaysinline {
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%v = load PTR_OP_ARGS(`<WIDTH x i64> ') %0
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%v1 = select <WIDTH x i1> %2, <WIDTH x i64> %1, <WIDTH x i64> %v
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store <WIDTH x i64> %v1, <WIDTH x i64> * %0
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ret void
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}
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define void @__masked_store_blend_double(<WIDTH x double>* nocapture,
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<WIDTH x double>, <WIDTH x i1>) nounwind alwaysinline {
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%v = load PTR_OP_ARGS(`<WIDTH x double> ') %0
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%v1 = select <WIDTH x i1> %2, <WIDTH x double> %1, <WIDTH x double> %v
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store <WIDTH x double> %v1, <WIDTH x double> * %0
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ret void
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; gather/scatter
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define(`gather_scatter', `
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declare <WIDTH x $1> @__gather_base_offsets32_$1(i8 * nocapture, i32, <WIDTH x i32>,
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<WIDTH x i1>) nounwind readonly
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declare <WIDTH x $1> @__gather_base_offsets64_$1(i8 * nocapture, i32, <WIDTH x i64>,
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<WIDTH x i1>) nounwind readonly
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declare <WIDTH x $1> @__gather32_$1(<WIDTH x i32>,
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<WIDTH x i1>) nounwind readonly
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declare <WIDTH x $1> @__gather64_$1(<WIDTH x i64>,
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<WIDTH x i1>) nounwind readonly
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declare void @__scatter_base_offsets32_$1(i8* nocapture, i32, <WIDTH x i32>,
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<WIDTH x $1>, <WIDTH x i1>) nounwind
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declare void @__scatter_base_offsets64_$1(i8* nocapture, i32, <WIDTH x i64>,
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<WIDTH x $1>, <WIDTH x i1>) nounwind
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declare void @__scatter32_$1(<WIDTH x i32>, <WIDTH x $1>,
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<WIDTH x i1>) nounwind
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declare void @__scatter64_$1(<WIDTH x i64>, <WIDTH x $1>,
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<WIDTH x i1>) nounwind
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')
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gather_scatter(i8)
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gather_scatter(i16)
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gather_scatter(i32)
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gather_scatter(float)
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gather_scatter(i64)
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gather_scatter(double)
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packed_load_and_store()
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; prefetch
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define_prefetches()
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; int8/int16 builtins
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define_avgs()
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declare_nvptx()
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; reciprocals in double precision, if supported
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rsqrtd_decl()
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rcpd_decl()
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transcendetals_decl()
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trigonometry_decl()
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