52 lines
1.8 KiB
Diff
52 lines
1.8 KiB
Diff
From 13c33dd2931ae9d9c5c9f142677f025281fbefca Mon Sep 17 00:00:00 2001
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From: Michael Liao <michael.hliao@gmail.com>
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Date: Fri, 1 Nov 2013 11:08:08 -0700
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Subject: [PATCH] Fix PR17764
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- %ret = select %mask, %v1, %v2 is equivalent to
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%ret = %mask ? %v1 : %v2
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but VPBLENDVB %mask, %v1, %v2, %ret (operands are in Intel assembly
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order) is equivalent to
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%ret = %mask ? %v2 : %v1
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---
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lib/Target/X86/X86InstrSSE.td | 2 +-
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test/CodeGen/X86/pr17764.ll | 10 ++++++++++
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2 files changed, 11 insertions(+), 1 deletion(-)
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create mode 100644 test/CodeGen/X86/pr17764.ll
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diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td
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index 7cae485..bac88f9 100644
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--- lib/Target/X86/X86InstrSSE.td
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+++ lib/Target/X86/X86InstrSSE.td
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@@ -6965,7 +6965,7 @@ let Predicates = [HasAVX] in {
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let Predicates = [HasAVX2] in {
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def : Pat<(v32i8 (vselect (v32i8 VR256:$mask), (v32i8 VR256:$src1),
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(v32i8 VR256:$src2))),
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- (VPBLENDVBYrr VR256:$src1, VR256:$src2, VR256:$mask)>;
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+ (VPBLENDVBYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
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def : Pat<(v16i16 (X86Blendi (v16i16 VR256:$src1), (v16i16 VR256:$src2),
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(imm:$mask))),
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(VPBLENDWYrri VR256:$src1, VR256:$src2, imm:$mask)>;
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diff --git a/test/CodeGen/X86/pr17764.ll b/test/CodeGen/X86/pr17764.ll
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new file mode 100644
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index 0000000..7a3fd6d
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--- /dev/null
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+++ test/CodeGen/X86/pr17764.ll
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@@ -0,0 +1,10 @@
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+; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core-avx2 | FileCheck %s
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+
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+define <16 x i16> @foo(<16 x i1> %mask, <16 x i16> %x, <16 x i16> %y) {
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+ %ret = select <16 x i1> %mask, <16 x i16> %x, <16 x i16> %y
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+ ret <16 x i16> %ret
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+}
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+
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+; CHECK: foo
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+; CHECK: vpblendvb %ymm0, %ymm1, %ymm2, %ymm0
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+; CHECK: ret
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--
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1.8.1.2
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