111 lines
4.2 KiB
LLVM
111 lines
4.2 KiB
LLVM
;; Copyright (c) 2012-2013, Intel Corporation
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;; All rights reserved.
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;;
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;; Redistribution and use in source and binary forms, with or without
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;; modification, are permitted provided that the following conditions are
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;; met:
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;;
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;; * Redistributions of source code must retain the above copyright
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;; notice, this list of conditions and the following disclaimer.
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;;
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;; * Redistributions in binary form must reproduce the above copyright
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;; notice, this list of conditions and the following disclaimer in the
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;; documentation and/or other materials provided with the distribution.
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;;
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;; * Neither the name of Intel Corporation nor the names of its
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;; contributors may be used to endorse or promote products derived from
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;; this software without specific prior written permission.
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;;
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;;
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;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
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;; IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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;; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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;; PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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;; OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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;; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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;; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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;; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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;; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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;; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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;; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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include(`target-avx.ll')
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rdrand_definition()
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saturation_arithmetic()
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; int min/max
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define <8 x i32> @__min_varying_int32(<8 x i32>, <8 x i32>) nounwind readonly alwaysinline {
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binary4to8(ret, i32, @llvm.x86.sse41.pminsd, %0, %1)
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ret <8 x i32> %ret
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}
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define <8 x i32> @__max_varying_int32(<8 x i32>, <8 x i32>) nounwind readonly alwaysinline {
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binary4to8(ret, i32, @llvm.x86.sse41.pmaxsd, %0, %1)
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ret <8 x i32> %ret
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; unsigned int min/max
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define <8 x i32> @__min_varying_uint32(<8 x i32>, <8 x i32>) nounwind readonly alwaysinline {
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binary4to8(ret, i32, @llvm.x86.sse41.pminud, %0, %1)
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ret <8 x i32> %ret
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}
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define <8 x i32> @__max_varying_uint32(<8 x i32>, <8 x i32>) nounwind readonly alwaysinline {
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binary4to8(ret, i32, @llvm.x86.sse41.pmaxud, %0, %1)
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ret <8 x i32> %ret
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}
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; gather
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gen_gather(i8)
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gen_gather(i16)
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gen_gather(i32)
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gen_gather(float)
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gen_gather(i64)
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gen_gather(double)
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; float/half conversions
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declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readnone
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; 0 is round nearest even
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declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readnone
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define <8 x float> @__half_to_float_varying(<8 x i16> %v) nounwind readnone {
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%r = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %v)
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ret <8 x float> %r
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}
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define <8 x i16> @__float_to_half_varying(<8 x float> %v) nounwind readnone {
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%r = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %v, i32 0)
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ret <8 x i16> %r
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}
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define float @__half_to_float_uniform(i16 %v) nounwind readnone {
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%v1 = bitcast i16 %v to <1 x i16>
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%vv = shufflevector <1 x i16> %v1, <1 x i16> undef,
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<8 x i32> <i32 0, i32 undef, i32 undef, i32 undef,
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i32 undef, i32 undef, i32 undef, i32 undef>
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%rv = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %vv)
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%r = extractelement <8 x float> %rv, i32 0
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ret float %r
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}
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define i16 @__float_to_half_uniform(float %v) nounwind readnone {
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%v1 = bitcast float %v to <1 x float>
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%vv = shufflevector <1 x float> %v1, <1 x float> undef,
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<8 x i32> <i32 0, i32 undef, i32 undef, i32 undef,
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i32 undef, i32 undef, i32 undef, i32 undef>
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; round to nearest even
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%rv = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %vv, i32 0)
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%r = extractelement <8 x i16> %rv, i32 0
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ret i16 %r
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}
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