avx1-i32x4 implementation as sse4-i32x4 with avx target-feature flag
This commit is contained in:
21
builtins.cpp
21
builtins.cpp
@@ -942,11 +942,22 @@ DefineStdlib(SymbolTable *symbolTable, llvm::LLVMContext *ctx, llvm::Module *mod
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case Target::AVX: {
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case Target::AVX: {
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switch (g->target->getVectorWidth()) {
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switch (g->target->getVectorWidth()) {
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case 4:
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case 4:
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if (runtime32) {
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if (g->target->getDataTypeWidth() == 32) {
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EXPORT_MODULE(builtins_bitcode_avx1_i64x4_32bit);
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if (runtime32) {
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}
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EXPORT_MODULE(builtins_bitcode_sse4_32bit);
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else {
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}
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EXPORT_MODULE(builtins_bitcode_avx1_i64x4_64bit);
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else {
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EXPORT_MODULE(builtins_bitcode_sse4_64bit);
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}
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} else if (g->target->getDataTypeWidth() == 64) {
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if (runtime32) {
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EXPORT_MODULE(builtins_bitcode_avx1_i64x4_32bit);
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}
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else {
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EXPORT_MODULE(builtins_bitcode_avx1_i64x4_64bit);
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}
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} else {
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FATAL("logic error in DefineStdlib");
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}
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}
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break;
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break;
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case 8:
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case 8:
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42
ispc.cpp
42
ispc.cpp
@@ -169,7 +169,7 @@ static const char *supportedCPUs[] = {
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, "core-avx-i", "core-avx2"
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, "core-avx-i", "core-avx2"
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#endif // LLVM 3.2+
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#endif // LLVM 3.2+
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#if !defined(LLVM_3_1) && !defined(LLVM_3_2) && !defined(LLVM_3_3)
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#if !defined(LLVM_3_1) && !defined(LLVM_3_2) && !defined(LLVM_3_3)
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, "slm"
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, "slm"
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#endif // LLVM 3.4+
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#endif // LLVM 3.4+
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};
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};
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@@ -191,6 +191,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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m_tf_attributes(NULL),
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m_tf_attributes(NULL),
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#endif
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#endif
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m_nativeVectorWidth(-1),
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m_nativeVectorWidth(-1),
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m_dataTypeWidth(-1),
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m_vectorWidth(-1),
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m_vectorWidth(-1),
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m_generatePIC(pic),
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m_generatePIC(pic),
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m_maskingIsFree(false),
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m_maskingIsFree(false),
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@@ -308,6 +309,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "sse2-i32x4")) {
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!strcasecmp(isa, "sse2-i32x4")) {
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this->m_isa = Target::SSE2;
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this->m_isa = Target::SSE2;
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this->m_nativeVectorWidth = 4;
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this->m_nativeVectorWidth = 4;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 4;
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this->m_vectorWidth = 4;
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this->m_attributes = "+sse,+sse2,-sse3,-sse4a,-ssse3,-popcnt"
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this->m_attributes = "+sse,+sse2,-sse3,-sse4a,-ssse3,-popcnt"
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#if defined(LLVM_3_4)
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#if defined(LLVM_3_4)
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@@ -323,6 +325,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "sse2-i32x8")) {
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!strcasecmp(isa, "sse2-i32x8")) {
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this->m_isa = Target::SSE2;
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this->m_isa = Target::SSE2;
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this->m_nativeVectorWidth = 4;
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this->m_nativeVectorWidth = 4;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 8;
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this->m_vectorWidth = 8;
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this->m_attributes = "+sse,+sse2,-sse3,-sse4a,-ssse3,-popcnt"
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this->m_attributes = "+sse,+sse2,-sse3,-sse4a,-ssse3,-popcnt"
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#if defined(LLVM_3_4)
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#if defined(LLVM_3_4)
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@@ -338,11 +341,12 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "sse4-i32x4")) {
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!strcasecmp(isa, "sse4-i32x4")) {
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this->m_isa = Target::SSE4;
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this->m_isa = Target::SSE4;
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this->m_nativeVectorWidth = 4;
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this->m_nativeVectorWidth = 4;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 4;
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this->m_vectorWidth = 4;
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// TODO: why not sse42 and popcnt?
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// TODO: why not sse42 and popcnt?
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this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
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this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
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#if defined(LLVM_3_4)
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#if defined(LLVM_3_4)
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",+sse4.1,-sse4.2"
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",+sse4.1,-sse4.2"
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#else
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#else
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",+sse41,-sse42"
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",+sse41,-sse42"
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#endif
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#endif
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@@ -355,10 +359,11 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "sse4-i32x8")) {
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!strcasecmp(isa, "sse4-i32x8")) {
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this->m_isa = Target::SSE4;
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this->m_isa = Target::SSE4;
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this->m_nativeVectorWidth = 4;
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this->m_nativeVectorWidth = 4;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 8;
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this->m_vectorWidth = 8;
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this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
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this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
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#if defined(LLVM_3_4)
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#if defined(LLVM_3_4)
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",+sse4.1,-sse4.2"
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",+sse4.1,-sse4.2"
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#else
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#else
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",+sse41,-sse42"
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",+sse41,-sse42"
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#endif
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#endif
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@@ -369,10 +374,11 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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else if (!strcasecmp(isa, "sse4-i8x16")) {
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else if (!strcasecmp(isa, "sse4-i8x16")) {
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this->m_isa = Target::SSE4;
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this->m_isa = Target::SSE4;
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this->m_nativeVectorWidth = 16;
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this->m_nativeVectorWidth = 16;
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this->m_dataTypeWidth = 8;
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this->m_vectorWidth = 16;
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this->m_vectorWidth = 16;
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this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
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this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
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#if defined(LLVM_3_4)
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#if defined(LLVM_3_4)
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",+sse4.1,-sse4.2"
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",+sse4.1,-sse4.2"
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#else
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#else
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",+sse41,-sse42"
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",+sse41,-sse42"
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#endif
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#endif
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@@ -383,10 +389,11 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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else if (!strcasecmp(isa, "sse4-i16x8")) {
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else if (!strcasecmp(isa, "sse4-i16x8")) {
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this->m_isa = Target::SSE4;
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this->m_isa = Target::SSE4;
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this->m_nativeVectorWidth = 8;
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this->m_nativeVectorWidth = 8;
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this->m_dataTypeWidth = 16;
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this->m_vectorWidth = 8;
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this->m_vectorWidth = 8;
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this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
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this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
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#if defined(LLVM_3_4)
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#if defined(LLVM_3_4)
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",+sse4.1,-sse4.2"
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",+sse4.1,-sse4.2"
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#else
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#else
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",+sse41,-sse42"
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",+sse41,-sse42"
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#endif
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#endif
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@@ -457,11 +464,21 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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this->m_maskingIsFree = false;
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this->m_maskingIsFree = false;
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this->m_maskBitCount = 32;
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this->m_maskBitCount = 32;
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}
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}
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else if (!strcasecmp(isa, "avx1-i32x4")) {
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this->m_isa = Target::AVX;
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this->m_nativeVectorWidth = 8;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 4;
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this->m_attributes = "+avx,+popcnt,+cmov";
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this->m_maskingIsFree = false;
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this->m_maskBitCount = 32;
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}
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else if (!strcasecmp(isa, "avx") ||
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else if (!strcasecmp(isa, "avx") ||
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!strcasecmp(isa, "avx1") ||
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!strcasecmp(isa, "avx1") ||
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!strcasecmp(isa, "avx1-i32x8")) {
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!strcasecmp(isa, "avx1-i32x8")) {
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this->m_isa = Target::AVX;
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this->m_isa = Target::AVX;
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this->m_nativeVectorWidth = 8;
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this->m_nativeVectorWidth = 8;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 8;
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this->m_vectorWidth = 8;
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this->m_attributes = "+avx,+popcnt,+cmov";
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this->m_attributes = "+avx,+popcnt,+cmov";
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this->m_maskingIsFree = false;
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this->m_maskingIsFree = false;
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@@ -471,6 +488,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "avx1-i64x4")) {
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!strcasecmp(isa, "avx1-i64x4")) {
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this->m_isa = Target::AVX;
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this->m_isa = Target::AVX;
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this->m_nativeVectorWidth = 8; /* native vector width in terms of floats */
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this->m_nativeVectorWidth = 8; /* native vector width in terms of floats */
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this->m_dataTypeWidth = 64;
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this->m_vectorWidth = 4;
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this->m_vectorWidth = 4;
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this->m_attributes = "+avx,+popcnt,+cmov";
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this->m_attributes = "+avx,+popcnt,+cmov";
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this->m_maskingIsFree = false;
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this->m_maskingIsFree = false;
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@@ -481,6 +499,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "avx1-i32x16")) {
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!strcasecmp(isa, "avx1-i32x16")) {
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this->m_isa = Target::AVX;
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this->m_isa = Target::AVX;
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this->m_nativeVectorWidth = 8;
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this->m_nativeVectorWidth = 8;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 16;
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this->m_vectorWidth = 16;
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this->m_attributes = "+avx,+popcnt,+cmov";
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this->m_attributes = "+avx,+popcnt,+cmov";
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this->m_maskingIsFree = false;
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this->m_maskingIsFree = false;
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@@ -490,6 +509,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "avx1.1-i32x8")) {
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!strcasecmp(isa, "avx1.1-i32x8")) {
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this->m_isa = Target::AVX11;
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this->m_isa = Target::AVX11;
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this->m_nativeVectorWidth = 8;
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this->m_nativeVectorWidth = 8;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 8;
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this->m_vectorWidth = 8;
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this->m_attributes = "+avx,+popcnt,+cmov,+f16c"
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this->m_attributes = "+avx,+popcnt,+cmov,+f16c"
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#if defined(LLVM_3_4)
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#if defined(LLVM_3_4)
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@@ -510,6 +530,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "avx1.1-i32x16")) {
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!strcasecmp(isa, "avx1.1-i32x16")) {
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this->m_isa = Target::AVX11;
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this->m_isa = Target::AVX11;
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this->m_nativeVectorWidth = 8;
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this->m_nativeVectorWidth = 8;
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this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 16;
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this->m_vectorWidth = 16;
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this->m_attributes = "+avx,+popcnt,+cmov,+f16c"
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this->m_attributes = "+avx,+popcnt,+cmov,+f16c"
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#if defined(LLVM_3_4)
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#if defined(LLVM_3_4)
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@@ -517,7 +538,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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#else
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#else
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",+rdrand"
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",+rdrand"
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#endif
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#endif
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;
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;
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this->m_maskingIsFree = false;
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this->m_maskingIsFree = false;
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this->m_maskBitCount = 32;
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this->m_maskBitCount = 32;
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this->m_hasHalf = true;
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this->m_hasHalf = true;
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@@ -529,6 +550,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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else if (!strcasecmp(isa, "avx1.1-i64x4")) {
|
else if (!strcasecmp(isa, "avx1.1-i64x4")) {
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this->m_isa = Target::AVX11;
|
this->m_isa = Target::AVX11;
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this->m_nativeVectorWidth = 8; /* native vector width in terms of floats */
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this->m_nativeVectorWidth = 8; /* native vector width in terms of floats */
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this->m_dataTypeWidth = 64;
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this->m_vectorWidth = 4;
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this->m_vectorWidth = 4;
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this->m_attributes = "+avx,+popcnt,+cmov,+f16c"
|
this->m_attributes = "+avx,+popcnt,+cmov,+f16c"
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#if defined(LLVM_3_4)
|
#if defined(LLVM_3_4)
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@@ -536,7 +558,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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#else
|
#else
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",+rdrand"
|
",+rdrand"
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#endif
|
#endif
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;
|
;
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this->m_maskingIsFree = false;
|
this->m_maskingIsFree = false;
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this->m_maskBitCount = 64;
|
this->m_maskBitCount = 64;
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this->m_hasHalf = true;
|
this->m_hasHalf = true;
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@@ -549,6 +571,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "avx2-i32x8")) {
|
!strcasecmp(isa, "avx2-i32x8")) {
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this->m_isa = Target::AVX2;
|
this->m_isa = Target::AVX2;
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this->m_nativeVectorWidth = 8;
|
this->m_nativeVectorWidth = 8;
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||||||
|
this->m_dataTypeWidth = 32;
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this->m_vectorWidth = 8;
|
this->m_vectorWidth = 8;
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this->m_attributes = "+avx2,+popcnt,+cmov,+f16c"
|
this->m_attributes = "+avx2,+popcnt,+cmov,+f16c"
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||||||
#if defined(LLVM_3_4)
|
#if defined(LLVM_3_4)
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@@ -573,6 +596,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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!strcasecmp(isa, "avx2-i32x16")) {
|
!strcasecmp(isa, "avx2-i32x16")) {
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this->m_isa = Target::AVX2;
|
this->m_isa = Target::AVX2;
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||||||
this->m_nativeVectorWidth = 16;
|
this->m_nativeVectorWidth = 16;
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||||||
|
this->m_dataTypeWidth = 32;
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||||||
this->m_vectorWidth = 16;
|
this->m_vectorWidth = 16;
|
||||||
this->m_attributes = "+avx2,+popcnt,+cmov,+f16c"
|
this->m_attributes = "+avx2,+popcnt,+cmov,+f16c"
|
||||||
#if defined(LLVM_3_4)
|
#if defined(LLVM_3_4)
|
||||||
@@ -596,6 +620,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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else if (!strcasecmp(isa, "avx2-i64x4")) {
|
else if (!strcasecmp(isa, "avx2-i64x4")) {
|
||||||
this->m_isa = Target::AVX2;
|
this->m_isa = Target::AVX2;
|
||||||
this->m_nativeVectorWidth = 8; /* native vector width in terms of floats */
|
this->m_nativeVectorWidth = 8; /* native vector width in terms of floats */
|
||||||
|
this->m_dataTypeWidth = 64;
|
||||||
this->m_vectorWidth = 4;
|
this->m_vectorWidth = 4;
|
||||||
this->m_attributes = "+avx2,+popcnt,+cmov,+f16c"
|
this->m_attributes = "+avx2,+popcnt,+cmov,+f16c"
|
||||||
#if defined(LLVM_3_4)
|
#if defined(LLVM_3_4)
|
||||||
@@ -620,6 +645,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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|||||||
else if (!strcasecmp(isa, "neon-i8x16")) {
|
else if (!strcasecmp(isa, "neon-i8x16")) {
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||||||
this->m_isa = Target::NEON8;
|
this->m_isa = Target::NEON8;
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||||||
this->m_nativeVectorWidth = 16;
|
this->m_nativeVectorWidth = 16;
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||||||
|
this->m_dataTypeWidth = 8;
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||||||
this->m_vectorWidth = 16;
|
this->m_vectorWidth = 16;
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||||||
this->m_attributes = "+neon,+fp16";
|
this->m_attributes = "+neon,+fp16";
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this->m_hasHalf = true; // ??
|
this->m_hasHalf = true; // ??
|
||||||
@@ -629,6 +655,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
|
|||||||
else if (!strcasecmp(isa, "neon-i16x8")) {
|
else if (!strcasecmp(isa, "neon-i16x8")) {
|
||||||
this->m_isa = Target::NEON16;
|
this->m_isa = Target::NEON16;
|
||||||
this->m_nativeVectorWidth = 8;
|
this->m_nativeVectorWidth = 8;
|
||||||
|
this->m_dataTypeWidth = 16;
|
||||||
this->m_vectorWidth = 8;
|
this->m_vectorWidth = 8;
|
||||||
this->m_attributes = "+neon,+fp16";
|
this->m_attributes = "+neon,+fp16";
|
||||||
this->m_hasHalf = true; // ??
|
this->m_hasHalf = true; // ??
|
||||||
@@ -639,6 +666,7 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
|
|||||||
!strcasecmp(isa, "neon-i32x4")) {
|
!strcasecmp(isa, "neon-i32x4")) {
|
||||||
this->m_isa = Target::NEON32;
|
this->m_isa = Target::NEON32;
|
||||||
this->m_nativeVectorWidth = 4;
|
this->m_nativeVectorWidth = 4;
|
||||||
|
this->m_dataTypeWidth = 32;
|
||||||
this->m_vectorWidth = 4;
|
this->m_vectorWidth = 4;
|
||||||
this->m_attributes = "+neon,+fp16";
|
this->m_attributes = "+neon,+fp16";
|
||||||
this->m_hasHalf = true; // ??
|
this->m_hasHalf = true; // ??
|
||||||
|
|||||||
8
ispc.h
8
ispc.h
@@ -253,6 +253,8 @@ public:
|
|||||||
|
|
||||||
int getNativeVectorWidth() const {return m_nativeVectorWidth;}
|
int getNativeVectorWidth() const {return m_nativeVectorWidth;}
|
||||||
|
|
||||||
|
int getDataTypeWidth() const {return m_dataTypeWidth;}
|
||||||
|
|
||||||
int getVectorWidth() const {return m_vectorWidth;}
|
int getVectorWidth() const {return m_vectorWidth;}
|
||||||
|
|
||||||
bool getGeneratePIC() const {return m_generatePIC;}
|
bool getGeneratePIC() const {return m_generatePIC;}
|
||||||
@@ -319,10 +321,14 @@ private:
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
/** Native vector width of the vector instruction set. Note that this
|
/** Native vector width of the vector instruction set. Note that this
|
||||||
value is directly derived from the ISA Being used (e.g. it's 4 for
|
value is directly derived from the ISA being used (e.g. it's 4 for
|
||||||
SSE, 8 for AVX, etc.) */
|
SSE, 8 for AVX, etc.) */
|
||||||
int m_nativeVectorWidth;
|
int m_nativeVectorWidth;
|
||||||
|
|
||||||
|
/** Data type with in bits. Typically it's 32, but could be 8, 16 or 64.
|
||||||
|
For generic it's -1, which means undefined. */
|
||||||
|
int m_dataTypeWidth;
|
||||||
|
|
||||||
/** Actual vector width currently being compiled to. This may be an
|
/** Actual vector width currently being compiled to. This may be an
|
||||||
integer multiple of the native vector width, for example if we're
|
integer multiple of the native vector width, for example if we're
|
||||||
"doubling up" and compiling 8-wide on a 4-wide SSE system. */
|
"doubling up" and compiling 8-wide on a 4-wide SSE system. */
|
||||||
|
|||||||
Reference in New Issue
Block a user