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Merge pull request #568 from jbrodman/master

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Fix against LLVM ToT
This commit is contained in:
Dmitry Babokin
2013-08-27 14:08:12 -07:00
parent f6ce969d9f 28080b0c22
commit c1cc80b1d5
1 changed files with 68 additions and 10 deletions
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78
ispc.cpp
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@@ -288,7 +288,13 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::SSE2; this->m_isa = Target::SSE2;
this->m_nativeVectorWidth = 4; this->m_nativeVectorWidth = 4;
this->m_vectorWidth = 4; this->m_vectorWidth = 4;
this->m_attributes = "+sse,+sse2,-sse3,-sse41,-sse42,-sse4a,-ssse3,-popcnt"; this->m_attributes = "+sse,+sse2,-sse3,-sse4a,-ssse3,-popcnt"
#if defined(LLVM_3_4)
",-sse4.1,-sse4.2"
#else
",-sse41,-sse42"
#endif
;
this->m_maskingIsFree = false; this->m_maskingIsFree = false;
this->m_maskBitCount = 32; this->m_maskBitCount = 32;
} }
@@ -297,7 +303,13 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::SSE2; this->m_isa = Target::SSE2;
this->m_nativeVectorWidth = 4; this->m_nativeVectorWidth = 4;
this->m_vectorWidth = 8; this->m_vectorWidth = 8;
this->m_attributes = "+sse,+sse2,-sse3,-sse41,-sse42,-sse4a,-ssse3,-popcnt"; this->m_attributes = "+sse,+sse2,-sse3,-sse4a,-ssse3,-popcnt"
#if defined(LLVM_3_4)
",-sse4.1,-sse4.2"
#else
",-sse41,-sse42"
#endif
;
this->m_maskingIsFree = false; this->m_maskingIsFree = false;
this->m_maskBitCount = 32; this->m_maskBitCount = 32;
} }
@@ -307,7 +319,13 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_nativeVectorWidth = 4; this->m_nativeVectorWidth = 4;
this->m_vectorWidth = 4; this->m_vectorWidth = 4;
// TODO: why not sse42 and popcnt? // TODO: why not sse42 and popcnt?
this->m_attributes = "+sse,+sse2,+sse3,+sse41,-sse42,-sse4a,+ssse3,-popcnt,+cmov"; this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
#if defined(LLVM_3_4)
",+sse4.1,-sse4.2"
#else
",+sse41,-sse42"
#endif
;
this->m_maskingIsFree = false; this->m_maskingIsFree = false;
this->m_maskBitCount = 32; this->m_maskBitCount = 32;
} }
@@ -317,7 +335,13 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::SSE4; this->m_isa = Target::SSE4;
this->m_nativeVectorWidth = 4; this->m_nativeVectorWidth = 4;
this->m_vectorWidth = 8; this->m_vectorWidth = 8;
this->m_attributes = "+sse,+sse2,+sse3,+sse41,-sse42,-sse4a,+ssse3,-popcnt,+cmov"; this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
#if defined(LLVM_3_4)
",+sse4.1,-sse4.2"
#else
",+sse41,-sse42"
#endif
;
this->m_maskingIsFree = false; this->m_maskingIsFree = false;
this->m_maskBitCount = 32; this->m_maskBitCount = 32;
} }
@@ -325,7 +349,13 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::SSE4; this->m_isa = Target::SSE4;
this->m_nativeVectorWidth = 16; this->m_nativeVectorWidth = 16;
this->m_vectorWidth = 16; this->m_vectorWidth = 16;
this->m_attributes = "+sse,+sse2,+sse3,+sse41,-sse42,-sse4a,+ssse3,-popcnt,+cmov"; this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
#if defined(LLVM_3_4)
",+sse4.1,-sse4.2"
#else
",+sse41,-sse42"
#endif
;
this->m_maskingIsFree = false; this->m_maskingIsFree = false;
this->m_maskBitCount = 8; this->m_maskBitCount = 8;
} }
@@ -333,7 +363,13 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::SSE4; this->m_isa = Target::SSE4;
this->m_nativeVectorWidth = 8; this->m_nativeVectorWidth = 8;
this->m_vectorWidth = 8; this->m_vectorWidth = 8;
this->m_attributes = "+sse,+sse2,+sse3,+sse41,-sse42,-sse4a,+ssse3,-popcnt,+cmov"; this->m_attributes = "+sse,+sse2,+sse3,-sse4a,+ssse3,-popcnt,+cmov"
#if defined(LLVM_3_4)
",+sse4.1,-sse4.2"
#else
",+sse41,-sse42"
#endif
;
this->m_maskingIsFree = false; this->m_maskingIsFree = false;
this->m_maskBitCount = 16; this->m_maskBitCount = 16;
} }
@@ -425,7 +461,13 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::AVX11; this->m_isa = Target::AVX11;
this->m_nativeVectorWidth = 8; this->m_nativeVectorWidth = 8;
this->m_vectorWidth = 8; this->m_vectorWidth = 8;
this->m_attributes = "+avx,+popcnt,+cmov,+f16c,+rdrand"; this->m_attributes = "+avx,+popcnt,+cmov,+f16c"
#if defined(LLVM_3_4)
",+rdrnd"
#else
",+rdrand"
#endif
;
this->m_maskingIsFree = false; this->m_maskingIsFree = false;
this->m_maskBitCount = 32; this->m_maskBitCount = 32;
this->m_hasHalf = true; this->m_hasHalf = true;
@@ -439,7 +481,13 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::AVX11; this->m_isa = Target::AVX11;
this->m_nativeVectorWidth = 8; this->m_nativeVectorWidth = 8;
this->m_vectorWidth = 16; this->m_vectorWidth = 16;
this->m_attributes = "+avx,+popcnt,+cmov,+f16c,+rdrand"; this->m_attributes = "+avx,+popcnt,+cmov,+f16c"
#if defined(LLVM_3_4)
",+rdrnd"
#else
",+rdrand"
#endif
;
this->m_maskingIsFree = false; this->m_maskingIsFree = false;
this->m_maskBitCount = 32; this->m_maskBitCount = 32;
this->m_hasHalf = true; this->m_hasHalf = true;
@@ -453,7 +501,12 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::AVX2; this->m_isa = Target::AVX2;
this->m_nativeVectorWidth = 8; this->m_nativeVectorWidth = 8;
this->m_vectorWidth = 8; this->m_vectorWidth = 8;
this->m_attributes = "+avx2,+popcnt,+cmov,+f16c,+rdrand" this->m_attributes = "+avx2,+popcnt,+cmov,+f16c"
#if defined(LLVM_3_4)
",+rdrnd"
#else
",+rdrand"
#endif
#ifndef LLVM_3_1 #ifndef LLVM_3_1
",+fma" ",+fma"
#endif // !LLVM_3_1 #endif // !LLVM_3_1
@@ -472,7 +525,12 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
this->m_isa = Target::AVX2; this->m_isa = Target::AVX2;
this->m_nativeVectorWidth = 16; this->m_nativeVectorWidth = 16;
this->m_vectorWidth = 16; this->m_vectorWidth = 16;
this->m_attributes = "+avx2,+popcnt,+cmov,+f16c,+rdrand" this->m_attributes = "+avx2,+popcnt,+cmov,+f16c"
#if defined(LLVM_3_4)
",+rdrnd"
#else
",+rdrand"
#endif
#ifndef LLVM_3_1 #ifndef LLVM_3_1
",+fma" ",+fma"
#endif // !LLVM_3_1 #endif // !LLVM_3_1