merged with master
This commit is contained in:
40
ispc.cpp
40
ispc.cpp
@@ -48,7 +48,7 @@
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#include <sys/types.h>
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#include <unistd.h>
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#endif
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#if defined(LLVM_3_1) || defined(LLVM_3_2)
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#if defined(LLVM_3_2)
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#include <llvm/LLVMContext.h>
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#include <llvm/Module.h>
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#include <llvm/Instructions.h>
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@@ -57,19 +57,20 @@
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#include <llvm/IR/Module.h>
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#include <llvm/IR/Instructions.h>
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#endif
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#if defined(LLVM_3_5)
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#if !defined(LLVM_3_2) && !defined(LLVM_3_3) && !defined(LLVM_3_4) && !defined(LLVM_3_5) // LLVM 3.6+
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#include <llvm/Target/TargetSubtargetInfo.h>
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#endif
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#if !defined(LLVM_3_2) && !defined(LLVM_3_3) && !defined(LLVM_3_4) // LLVM 3.5+
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#include <llvm/IR/DebugInfo.h>
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#include <llvm/IR/DIBuilder.h>
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#else
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#else // LLVM 3.2, 3.3, 3.4
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#include <llvm/DebugInfo.h>
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#include <llvm/DIBuilder.h>
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#endif
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#include <llvm/Support/Dwarf.h>
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#include <llvm/Target/TargetMachine.h>
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#include <llvm/Target/TargetOptions.h>
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#if defined(LLVM_3_1)
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#include <llvm/Target/TargetData.h>
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#elif defined(LLVM_3_2)
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#if defined(LLVM_3_2)
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#include <llvm/DataLayout.h>
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#else // LLVM 3.3+
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#include <llvm/IR/DataLayout.h>
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@@ -165,10 +166,8 @@ static const char *supportedCPUs[] = {
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"cortex-a9", "cortex-a15",
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#endif
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"atom", "penryn", "core2", "corei7", "corei7-avx"
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#if !defined(LLVM_3_1)
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, "core-avx-i", "core-avx2"
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#endif // LLVM 3.2+
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#if !defined(LLVM_3_1) && !defined(LLVM_3_2) && !defined(LLVM_3_3)
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#if !defined(LLVM_3_2) && !defined(LLVM_3_3)
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, "slm"
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#endif // LLVM 3.4+
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};
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@@ -176,18 +175,14 @@ static const char *supportedCPUs[] = {
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Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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m_target(NULL),
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m_targetMachine(NULL),
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#if defined(LLVM_3_1)
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m_targetData(NULL),
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#else
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m_dataLayout(NULL),
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#endif
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m_valid(false),
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m_isa(SSE2),
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m_arch(""),
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m_is32Bit(true),
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m_cpu(""),
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m_attributes(""),
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#if !defined(LLVM_3_1) && !defined(LLVM_3_2)
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#if !defined(LLVM_3_2)
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m_tf_attributes(NULL),
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#endif
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m_nativeVectorWidth(-1),
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@@ -666,10 +661,8 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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m_isa == Target::NEON32)
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options.FloatABIType = llvm::FloatABI::Hard;
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#endif
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#if !defined(LLVM_3_1)
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if (g->opt.disableFMA == false)
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options.AllowFPOpFusion = llvm::FPOpFusion::Fast;
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#endif // !LLVM_3_1
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#ifdef ISPC_IS_WINDOWS
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if (strcmp("x86", arch) == 0) {
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@@ -688,12 +681,12 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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// Initialize TargetData/DataLayout in 3 steps.
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// 1. Get default data layout first
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std::string dl_string;
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#if defined(LLVM_3_1)
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dl_string = m_targetMachine->getTargetData()->getStringRepresentation();
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#if !defined(LLVM_3_2) && !defined(LLVM_3_3) && !defined(LLVM_3_4) && !defined(LLVM_3_5) // LLVM 3.6+
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dl_string = m_targetMachine->getSubtargetImpl()->getDataLayout()->getStringRepresentation();
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#else
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dl_string = m_targetMachine->getDataLayout()->getStringRepresentation();
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#endif
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// 2. Adjust for generic
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if (m_isa == Target::GENERIC) {
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// <16 x i1> vectors only need 16 bit / 2 byte alignment, so add
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@@ -707,19 +700,16 @@ Target::Target(const char *arch, const char *cpu, const char *isa, bool pic) :
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}
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// 3. Finally set member data
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#if defined(LLVM_3_1)
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m_targetData = new llvm::TargetData(dl_string);
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#else
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m_dataLayout = new llvm::DataLayout(dl_string);
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#endif
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// Set is32Bit
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// This indicates if we are compiling for 32 bit platform
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// and can assume 32 bit runtime.
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// FIXME: all generic targets are handled as 64 bit, which is incorrect.
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this->m_is32Bit = (getDataLayout()->getPointerSize() == 4);
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#if !defined(LLVM_3_1) && !defined(LLVM_3_2)
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#if !defined(LLVM_3_2)
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// This is LLVM 3.3+ feature.
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// Initialize target-specific "target-feature" attribute.
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if (!m_attributes.empty()) {
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@@ -1013,7 +1003,7 @@ Target::StructOffset(llvm::Type *type, int element,
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}
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void Target::markFuncWithTargetAttr(llvm::Function* func) {
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#if !defined(LLVM_3_1) && !defined(LLVM_3_2)
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#if !defined(LLVM_3_2)
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if (m_tf_attributes) {
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func->addAttributes(llvm::AttributeSet::FunctionIndex, *m_tf_attributes);
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}
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