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fixed to work with LLVM 3.2

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Evghenii
2013-11-21 11:03:03 +01:00
parent 321b087039
commit 6f200d310f
6 changed files with 15 additions and 12 deletions
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2
Makefile
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@@ -36,7 +36,7 @@
# If you have your own special version of llvm and/or clang, change # If you have your own special version of llvm and/or clang, change
# these variables to match. # these variables to match.
LLVM_CONFIG=$(shell which /home/evghenii/usr/local/llvm/bin-trunk/bin/llvm-config) LLVM_CONFIG=$(shell which /home/evghenii/usr/local/llvm/bin-3.2/bin/llvm-config)
CLANG_INCLUDE=$(shell $(LLVM_CONFIG) --includedir) CLANG_INCLUDE=$(shell $(LLVM_CONFIG) --includedir)
# Enable ARM by request # Enable ARM by request

10
builtins/target-nvptx64.ll
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@@ -647,15 +647,15 @@ define float @__reduce_add_float(<1 x float> %v) nounwind readonly alwaysinline
define float @__reduce_min_float(<1 x float>) nounwind readnone { define float @__reduce_min_float(<1 x float>) nounwind readnone {
%value = extractelement <1 x float> %0, i32 0 %value = extractelement <1 x float> %0, i32 0
%call = tail call float @__shfl_xor_float(float %value, i32 16) %call = tail call float @__shfl_xor_float(float %value, i32 16)
%call1 = tail call float @__fminf(float %value, float %call) #4 %call1 = tail call float @__fminf(float %value, float %call)
%call.1 = tail call float @__shfl_xor_float(float %call1, i32 8) %call.1 = tail call float @__shfl_xor_float(float %call1, i32 8)
%call1.1 = tail call float @__fminf(float %call1, float %call.1) #4 %call1.1 = tail call float @__fminf(float %call1, float %call.1)
%call.2 = tail call float @__shfl_xor_float(float %call1.1, i32 4) %call.2 = tail call float @__shfl_xor_float(float %call1.1, i32 4)
%call1.2 = tail call float @__fminf(float %call1.1, float %call.2) #4 %call1.2 = tail call float @__fminf(float %call1.1, float %call.2)
%call.3 = tail call float @__shfl_xor_float(float %call1.2, i32 2) %call.3 = tail call float @__shfl_xor_float(float %call1.2, i32 2)
%call1.3 = tail call float @__fminf(float %call1.2, float %call.3) #4 %call1.3 = tail call float @__fminf(float %call1.2, float %call.3)
%call.4 = tail call float @__shfl_xor_float(float %call1.3, i32 1) %call.4 = tail call float @__shfl_xor_float(float %call1.3, i32 1)
%call1.4 = tail call float @__fminf(float %call1.3, float %call.4) #4 %call1.4 = tail call float @__fminf(float %call1.3, float %call.4)
ret float %call1.4 ret float %call1.4
} }

4
builtins/util_ptx.m4
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@@ -2917,7 +2917,7 @@ entry:
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
%call2 = tail call noalias i8* @malloc(i64 %size) #3 %call2 = tail call noalias i8* @malloc(i64 %size)
%phitmp = ptrtoint i8* %call2 to i64 %phitmp = ptrtoint i8* %call2 to i64
br label %if.end br label %if.end
@@ -2946,7 +2946,7 @@ entry:
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
tail call void @free(i8* %ptr) #3 tail call void @free(i8* %ptr)
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry

1
examples_cuda/aobench/ao1.ispc
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@@ -298,4 +298,5 @@ export void ao_ispc_tasks(uniform int w, uniform int h, uniform int nsubsamples,
const uniform int ntilex = (w+TILEX-1)/TILEX; const uniform int ntilex = (w+TILEX-1)/TILEX;
const uniform int ntiley = (h+TILEY-1)/TILEY; const uniform int ntiley = (h+TILEY-1)/TILEY;
launch[ntilex,ntiley] ao_task(w, h, nsubsamples, image); launch[ntilex,ntiley] ao_task(w, h, nsubsamples, image);
sync;
} }

5
examples_cuda/deferred/Makefile_gpu
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@@ -41,8 +41,9 @@ $(PROG): $(CXX_OBJ) kernel.ptx
$(ISPC) $(ISPCFLAGS) --emit-llvm -o `basename $< .ispc`_ispc_nvptx64.bc -h `basename $< .ispc`_ispc.h $< --emit-llvm $(ISPC) $(ISPCFLAGS) --emit-llvm -o `basename $< .ispc`_ispc_nvptx64.bc -h `basename $< .ispc`_ispc.h $< --emit-llvm
%.ptx: %.bc %.ptx: %.bc
$(LLVM32DIS) $< $(PTXGEN) $< > $@
$(PTXGEN) `basename $< .bc`.ll > $@ # $(LLVM32DIS) $<
# $(PTXGEN) `basename $< .bc`.ll > $@
kernel.ptx: $(PTXSRC) kernel.ptx: $(PTXSRC)
cat $^ > kernel.ptx cat $^ > kernel.ptx

5
examples_cuda/options/Makefile_gpu
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@@ -42,8 +42,9 @@ $(PROG): $(CXX_OBJ) kernel.ptx
$(ISPC) $(ISPCFLAGS) --emit-llvm -o `basename $< .ispc`_ispc_nvptx64.bc -h `basename $< .ispc`_ispc.h $< --emit-llvm $(ISPC) $(ISPCFLAGS) --emit-llvm -o `basename $< .ispc`_ispc_nvptx64.bc -h `basename $< .ispc`_ispc.h $< --emit-llvm
%.ptx: %.bc %.ptx: %.bc
$(LLVM32DIS) $< $(PTXGEN) $< > $@
$(PTXGEN) `basename $< .bc`.ll > $@ # $(LLVM32DIS) $<
# $(PTXGEN) `basename $< .bc`.ll > $@
kernel.ptx: $(PTXSRC) kernel.ptx: $(PTXSRC)
cat $^ > kernel.ptx cat $^ > kernel.ptx