LLVM 3.9 version support

This commit is contained in:
Dmitry Babokin
2016-01-14 17:26:38 +03:00
parent 44d8a2e01f
commit 536b30e12c
7 changed files with 36 additions and 9 deletions

View File

@@ -149,6 +149,8 @@ define(`PTR_OP_ARGS',
ifelse(LLVM_VERSION, LLVM_3_7,
``$1 , $1 *'',
LLVM_VERSION, LLVM_3_8,
``$1 , $1 *'',
LLVM_VERSION, LLVM_3_9,
``$1 , $1 *'',
``$1 *''
)

View File

@@ -35,6 +35,8 @@ define(`WIDTH',`16')
ifelse(LLVM_VERSION, LLVM_3_7,
`include(`target-avx512-common.ll')',
LLVM_VERSION, LLVM_3_8,
`include(`target-avx512-common.ll')',
LLVM_VERSION, LLVM_3_9,
`include(`target-avx512-common.ll')'
)

View File

@@ -54,6 +54,10 @@ define(`MASK_HIGH_BIT_ON',
define(`PTR_OP_ARGS',
ifelse(LLVM_VERSION, LLVM_3_7,
``$1 , $1 *'',
ifelse(LLVM_VERSION, LLVM_3_8,
``$1 , $1 *'',
ifelse(LLVM_VERSION, LLVM_3_9,
``$1 , $1 *'',
``$1 *''
)
)

View File

@@ -55,6 +55,8 @@ define(`PTR_OP_ARGS',
ifelse(LLVM_VERSION, LLVM_3_7,
``$1 , $1 *'',
LLVM_VERSION, LLVM_3_8,
``$1 , $1 *'',
LLVM_VERSION, LLVM_3_9,
``$1 , $1 *'',
``$1 *''
)
@@ -64,6 +66,8 @@ define(`PTR_OP_ARGS',
define(`MdORi64',
ifelse(LLVM_VERSION, LLVM_3_8,
``i64'',
LLVM_VERSION, LLVM_3_9,
``i64'',
``double''
)
@@ -71,6 +75,8 @@ define(`MdORi64',
define(`MfORi32',
ifelse(LLVM_VERSION, LLVM_3_8,
``i32'',
LLVM_VERSION, LLVM_3_9,
``i32'',
``float''
)
@@ -1564,7 +1570,7 @@ define <$1 x $2> @__atomic_compare_exchange_$3_global($2* %ptr, <$1 x $2> %cmp,
%cmp_LANE_ID = extractelement <$1 x $2> %cmp, i32 LANE
%val_LANE_ID = extractelement <$1 x $2> %val, i32 LANE
;; 3.5, 3.6, 3.7 and 3.8 code is the same since m4 has no OR and AND operators
;; 3.5, 3.6, 3.7, 3.8 and 3.9 code is the same since m4 has no OR and AND operators
ifelse(LLVM_VERSION,LLVM_3_5,`
%r_LANE_ID_t = cmpxchg $2 * %ptr, $2 %cmp_LANE_ID, $2 %val_LANE_ID seq_cst seq_cst
%r_LANE_ID = extractvalue { $2, i1 } %r_LANE_ID_t, 0
@@ -1577,6 +1583,9 @@ define <$1 x $2> @__atomic_compare_exchange_$3_global($2* %ptr, <$1 x $2> %cmp,
',LLVM_VERSION,LLVM_3_8,`
%r_LANE_ID_t = cmpxchg $2 * %ptr, $2 %cmp_LANE_ID, $2 %val_LANE_ID seq_cst seq_cst
%r_LANE_ID = extractvalue { $2, i1 } %r_LANE_ID_t, 0
',LLVM_VERSION,LLVM_3_9,`
%r_LANE_ID_t = cmpxchg $2 * %ptr, $2 %cmp_LANE_ID, $2 %val_LANE_ID seq_cst seq_cst
%r_LANE_ID = extractvalue { $2, i1 } %r_LANE_ID_t, 0
',`
%r_LANE_ID = cmpxchg $2 * %ptr, $2 %cmp_LANE_ID, $2 %val_LANE_ID seq_cst
')
@@ -1589,7 +1598,7 @@ define <$1 x $2> @__atomic_compare_exchange_$3_global($2* %ptr, <$1 x $2> %cmp,
define $2 @__atomic_compare_exchange_uniform_$3_global($2* %ptr, $2 %cmp,
$2 %val) nounwind alwaysinline {
;; 3.5, 3.6, 3.7 and 3.8 code is the same since m4 has no OR and AND operators
;; 3.5, 3.6, 3.7, 3.8 and 3.9 code is the same since m4 has no OR and AND operators
ifelse(LLVM_VERSION,LLVM_3_5,`
%r_t = cmpxchg $2 * %ptr, $2 %cmp, $2 %val seq_cst seq_cst
%r = extractvalue { $2, i1 } %r_t, 0
@@ -1602,6 +1611,9 @@ define $2 @__atomic_compare_exchange_uniform_$3_global($2* %ptr, $2 %cmp,
',LLVM_VERSION,LLVM_3_8,`
%r_t = cmpxchg $2 * %ptr, $2 %cmp, $2 %val seq_cst seq_cst
%r = extractvalue { $2, i1 } %r_t, 0
',LLVM_VERSION,LLVM_3_9,`
%r_t = cmpxchg $2 * %ptr, $2 %cmp, $2 %val seq_cst seq_cst
%r = extractvalue { $2, i1 } %r_t, 0
',`
%r = cmpxchg $2 * %ptr, $2 %cmp, $2 %val seq_cst
')