diff --git a/Makefile b/Makefile
index 23a2428a..0d61c611 100644
--- a/Makefile
+++ b/Makefile
@@ -85,7 +85,7 @@ CXX_SRC=ast.cpp builtins.cpp cbackend.cpp ctx.cpp decl.cpp expr.cpp func.cpp \
HEADERS=ast.h builtins.h ctx.h decl.h expr.h func.h ispc.h llvmutil.h module.h \
opt.h stmt.h sym.h type.h util.h
TARGETS=avx1 avx1-x2 avx2 avx2-x2 sse2 sse2-x2 sse4 sse4-x2 generic-4 generic-8 \
- generic-16 generic-32 generic-1
+ generic-16 generic-32 generic-64 generic-1
BUILTINS_SRC=$(addprefix builtins/target-, $(addsuffix .ll, $(TARGETS))) \
builtins/dispatch.ll
BUILTINS_OBJS=$(addprefix builtins-, $(notdir $(BUILTINS_SRC:.ll=.o))) \
diff --git a/builtins.cpp b/builtins.cpp
index 14444f40..db55758a 100644
--- a/builtins.cpp
+++ b/builtins.cpp
@@ -1,5 +1,5 @@
/*
- Copyright (c) 2010-2011, Intel Corporation
+ Copyright (c) 2010-2012, Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -854,6 +854,13 @@ DefineStdlib(SymbolTable *symbolTable, llvm::LLVMContext *ctx, llvm::Module *mod
builtins_bitcode_generic_32_length,
module, symbolTable);
break;
+ case 64:
+ extern unsigned char builtins_bitcode_generic_64[];
+ extern int builtins_bitcode_generic_64_length;
+ AddBitcodeToModule(builtins_bitcode_generic_64,
+ builtins_bitcode_generic_64_length,
+ module, symbolTable);
+ break;
case 1:
extern unsigned char builtins_bitcode_generic_1[];
extern int builtins_bitcode_generic_1_length;
diff --git a/builtins/target-generic-64.ll b/builtins/target-generic-64.ll
new file mode 100644
index 00000000..09443f8e
--- /dev/null
+++ b/builtins/target-generic-64.ll
@@ -0,0 +1,33 @@
+;; Copyright (c) 2010-2012, Intel Corporation
+;; All rights reserved.
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are
+;; met:
+;;
+;; * Redistributions of source code must retain the above copyright
+;; notice, this list of conditions and the following disclaimer.
+;;
+;; * Redistributions in binary form must reproduce the above copyright
+;; notice, this list of conditions and the following disclaimer in the
+;; documentation and/or other materials provided with the distribution.
+;;
+;; * Neither the name of Intel Corporation nor the names of its
+;; contributors may be used to endorse or promote products derived from
+;; this software without specific prior written permission.
+;;
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+;; IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+;; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+;; PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
+;; OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+;; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+;; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+;; PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+;; LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+;; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+;; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+define(`WIDTH',`64')
+include(`target-generic-common.ll')
diff --git a/ispc.cpp b/ispc.cpp
index ac429cb9..341206c6 100644
--- a/ispc.cpp
+++ b/ispc.cpp
@@ -268,6 +268,15 @@ Target::GetTarget(const char *arch, const char *cpu, const char *isa,
t->hasHalf = true;
t->hasTranscendentals = true;
}
+ else if (!strcasecmp(isa, "generic-64")) {
+ t->isa = Target::GENERIC;
+ t->nativeVectorWidth = 64;
+ t->vectorWidth = 64;
+ t->maskingIsFree = true;
+ t->maskBitCount = 1;
+ t->hasHalf = true;
+ t->hasTranscendentals = true;
+ }
else if (!strcasecmp(isa, "generic-1")) {
t->isa = Target::GENERIC;
t->nativeVectorWidth = 1;
diff --git a/ispc.vcxproj b/ispc.vcxproj
index 34ef9373..6478df4e 100755
--- a/ispc.vcxproj
+++ b/ispc.vcxproj
@@ -30,6 +30,7 @@
+
@@ -278,6 +279,19 @@
Building gen-bitcode-generic-32.cpp
+
+
+ Document
+ m4 -Ibuiltins/ -DLLVM_VERSION=%LLVM_VERSION% builtins\target-generic-64.ll | python bitcode2cpp.py builtins\target-generic-64.ll > gen-bitcode-generic-64.cpp
+ gen-bitcode-generic-64.cpp
+ builtins\util.m4;builtins\target-generic-common.ll
+ m4 -Ibuiltins/ -DLLVM_VERSION=%LLVM_VERSION% builtins\target-generic-64.ll | python bitcode2cpp.py builtins\target-generic-64.ll > gen-bitcode-generic-64.cpp
+ gen-bitcode-generic-64.cpp
+ builtins\util.m4;builtins\target-generic-common.ll
+ Building gen-bitcode-generic-64.cpp
+ Building gen-bitcode-generic-64.cpp
+
+
Document