Merge pull request #500 from dbabokin/docs

Bringing docs/ispc.rst in sync with ispc.html at web site

docs/ispc.rst

@@ -59,7 +59,7 @@ Contents:
   + `Basic Command-line Options`_
   + `Selecting The Compilation Target`_
   + `Generating Generic C++ Output`_
-  + `Compiling For The Intel® Many Integrated Core Architecture`_
+  + `Compiling For The Intel®  Xeon Phi™ Architecture`_
   + `Selecting 32 or 64 Bit Addressing`_
   + `The Preprocessor`_
   + `Debugging`_
@@ -560,16 +560,15 @@ C++ file; this can be used to easily include specific implementations of
 the vector types and functions.
 
 
-Compiling For The Intel® Many Integrated Core Architecture
+Compiling For The Intel®  Xeon Phi™ Architecture
 ----------------------------------------------------------
 
 ``ispc`` has beta-level support for compiling for the many-core Intel®
-Xeon Phi™ processor, part of the Intel® Many Integrated Core
+Xeon Phi™ architecture (formerly, "Many Integrated Cores" / MIC).
-Architecture (MIC).  For the first generation of processor, code named
+This support is based on the "generic" C++ output, described in the previous
-Knights Corner, this support is based on the "generic" C++ output,
+section.
-described in the previous section.
 
-To compile for Knight's Corner, first generate intermediate C++ code:
+To compile for Xeon Phi™, first generate intermediate C++ code:
 
 ::
 
@@ -578,8 +577,8 @@ To compile for Knight's Corner, first generate intermediate C++ code:
 
 The ``ispc`` distribution now includes a header file,
 ``examples/intrinsics/knc.h``, which maps from the generic C++ output
-to the corresponding intrinsic operations supported by Knights Corner.  Thus,
+to the corresponding intrinsic operations supported by Intel Xeon Phi™.
-to generate an object file, use the Intel C Compiler (``icc``) compile
+Thus, to generate an object file, use the Intel C Compiler (``icc``) compile
 the C++ code generated by ``ispc``, setting the ``#include`` search
 path so that it can find the ``examples/intrinsics/knc.h`` header file
 in the ``ispc`` distribution.
@@ -589,7 +588,7 @@ in the ``ispc`` distribution.
   icc -mmic -Iexamples/intrinsics/ foo.cpp -o foo.o 
 
 With the current beta implementation, complex ``ispc`` programs are able to
-run on Knights Corner, though there are a number of known limitations:
+run on Xeon Phi™, though there are a number of known limitations:
 
 * The ``examples/intrinsics/knc.h`` header file isn't complete yet; for
   example, vector operations with ``int8`` and ``int16`` types aren't yet
@@ -599,8 +598,8 @@ run on Knights Corner, though there are a number of known limitations:
 
 * If you use the ``launch`` functionality to launch tasks across cores,
   note that the pthreads task system implemented in
-  ``examples/tasksys.cpp`` offers several implemenetations for Knights
+  ``examples/tasksys.cpp`` offers several implemenetations for Xeon Phi™.
-  Corner.  You will need to experiment to understand which one is most
+  You will need to experiment to understand which one is most
   appropriate for your workload.
 
 * The compiler currently emits unaligned memory accesses in many cases
@@ -611,26 +610,18 @@ run on Knights Corner, though there are a number of known limitations:
   precision compliance (using ICC option ``-fp-model strict``) or
   accurate reporting of floating point exceptions (using ICC option
   ``-fp-model except``) the compiler will generate code that uses the
-  x87 unit rather than KNC's vector unit. For similar reasons, the
+  x87 unit rather than Xeon Phi™'s vector unit. For similar reasons, the
   options ``–ansi`` and ``–fmath-errno`` may result in calls to math
-  functions that are implemented in x87 rather than using Initial Many
+  functions that are implemented in x87 rather than using vector instructions.
-  Core Instructions (Intel® IMCI) instructions.  This will have a
+  This will have a significant performance impact. See the ICC manual for
-  significant performance impact. See the ICC manual for details on
+  details on these compiler options.
-  these compiler options.
 
 All of these issues are currently actively being addressed and will be
 fixed in future releases.
 
-If you do use the current version of ``ispc`` on Knights Corner,
+If you do use the current version of ``ispc`` on Intel Xeon Phi™,
 please let us know of any bugs or unexpected results.  (Also, any
-interesting results!).  *Note that access to Intel® Xeon Phi™
+interesting results!).
-processor and public discussion of Intel® Xeon Phi™ processor
-performance is still governed by NDA*, so please send email to "matt
-dot pharr at intel dot com" for any issues that shouldn't be filed in
-the `public ispc bug tracker`_.
-
-.. _public ispc bug tracker: https://github.com/ispc/ispc/issues
-
 
 Selecting 32 or 64 Bit Addressing
 ---------------------------------
@@ -4694,7 +4685,7 @@ countries.
 
 * Other names and brands may be claimed as the property of others.
 
-Copyright(C) 2011, Intel Corporation. All rights reserved.
+Copyright(C) 2011-2013, Intel Corporation. All rights reserved.
 
 
 Optimization Notice