From 8336615eae4ad70f3d30332c8e1d6176701bb022 Mon Sep 17 00:00:00 2001 From: Vsevolod Livinskiy Date: Thu, 16 Apr 2015 13:02:24 +0300 Subject: [PATCH 1/2] Typo fix in util-nvptx.m4 --- builtins/util-nvptx.m4 | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/builtins/util-nvptx.m4 b/builtins/util-nvptx.m4 index 55ce3ee3..b620f5bb 100644 --- a/builtins/util-nvptx.m4 +++ b/builtins/util-nvptx.m4 @@ -49,6 +49,17 @@ define(`MASK_HIGH_BIT_ON', ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +;; LLVM has different IR for different versions since 3.7 + +define(`PTR_OP_ARGS', + ifelse(LLVM_VERSION, LLVM_3_7, + ``$1 , $1 *'', + ``$1 *'' + ) +) + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + ;; vector deconstruction utilities ;; split 8-wide vector into 2 4-wide vectors ;; @@ -2759,7 +2770,7 @@ entry: if.then: ; preds = %entry %idxprom = ashr i64 %call, 32 - %arrayidx = getelementptr inbounds PTR_OP_ARGS(`i32') startptr, i64 %idxprom + %arrayidx = getelementptr inbounds PTR_OP_ARGS(`i32') %startptr, i64 %idxprom %val = load PTR_OP_ARGS(`i32') %arrayidx, align 4 %valvec = insertelement <1 x i32> undef, i32 %val, i32 0 store <1 x i32> %valvec, <1 x i32>* %val_ptr, align 4 @@ -2780,7 +2791,7 @@ entry: if.then: ; preds = %entry %idxprom = ashr i64 %call, 32 - %arrayidx = getelementptr inbounds PTR_OP_ARGS(`i32') startptr, i64 %idxprom + %arrayidx = getelementptr inbounds PTR_OP_ARGS(`i32') %startptr, i64 %idxprom %val = extractelement <1 x i32> %vals, i32 0 store i32 %val, i32* %arrayidx, align 4 br label %if.end From 41750a83361af7e1dd89127c7df425ad21bfabdd Mon Sep 17 00:00:00 2001 From: Vsevolod Livinskiy Date: Thu, 16 Apr 2015 13:11:44 +0300 Subject: [PATCH 2/2] Reorder available targets --- ispc.cpp | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/ispc.cpp b/ispc.cpp index 6fe3579e..c799247e 100644 --- a/ispc.cpp +++ b/ispc.cpp @@ -1010,12 +1010,6 @@ Target::SupportedArchs() { const char * Target::SupportedTargets() { return -#ifdef ISPC_ARM_ENABLED - "neon-i8x16, neon-i16x8, neon-i32x4, " -#endif -#ifdef ISPC_NVPTX_ENABLED - "nvptx, " -#endif "sse2-i32x4, sse2-i32x8, " "sse4-i32x4, sse4-i32x8, sse4-i16x8, sse4-i8x16, " "avx1-i32x4, " @@ -1023,7 +1017,15 @@ Target::SupportedTargets() { "avx1.1-i32x8, avx1.1-i32x16, avx1.1-i64x4 " "avx2-i32x8, avx2-i32x16, avx2-i64x4, " "generic-x1, generic-x4, generic-x8, generic-x16, " - "generic-x32, generic-x64"; + "generic-x32, generic-x64" +#ifdef ISPC_ARM_ENABLED + ", neon-i8x16, neon-i16x8, neon-i32x4" +#endif +#ifdef ISPC_NVPTX_ENABLED + ", nvptx" +#endif +; + }