From 1710b9171fa54f40165a0917ec764e70951b9841 Mon Sep 17 00:00:00 2001 From: egaburov Date: Fri, 18 Oct 2013 08:53:01 +0200 Subject: [PATCH] removed LLVM_3_0 legacy part and changed copyright to 2013 --- builtins/target-avx11-i64x4.ll | 10 ++-------- builtins/target-avx2-i64x4.ll | 22 ++++------------------ 2 files changed, 6 insertions(+), 26 deletions(-) diff --git a/builtins/target-avx11-i64x4.ll b/builtins/target-avx11-i64x4.ll index aae612bb..8fe75266 100644 --- a/builtins/target-avx11-i64x4.ll +++ b/builtins/target-avx11-i64x4.ll @@ -1,4 +1,4 @@ -;; Copyright (c) 2012, Intel Corporation +;; Copyright (c) 2013, Intel Corporation ;; All rights reserved. ;; ;; Redistribution and use in source and binary forms, with or without @@ -31,8 +31,7 @@ include(`target-avx1-i64x4base.ll') -ifelse(LLVM_VERSION, `LLVM_3_0', `rdrand_decls()', - LLVM_VERSION, `LLVM_3_1', `rdrand_decls()', +ifelse(LLVM_VERSION, `LLVM_3_1', `rdrand_decls()', `rdrand_definition()') ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -74,10 +73,6 @@ gen_gather(double) ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; float/half conversions -ifelse(LLVM_VERSION, `LLVM_3_0', ` -;; nothing to define... -', ` - define(`expand_4to8', ` %$3 = shufflevector <4 x $1> %$2, <4 x $1> undef, <8 x i32> ') @@ -123,4 +118,3 @@ define i16 @__float_to_half_uniform(float %v) nounwind readnone { %r = extractelement <8 x i16> %rv, i32 0 ret i16 %r } -') diff --git a/builtins/target-avx2-i64x4.ll b/builtins/target-avx2-i64x4.ll index cdd10386..d74f32dc 100644 --- a/builtins/target-avx2-i64x4.ll +++ b/builtins/target-avx2-i64x4.ll @@ -1,4 +1,4 @@ -;; Copyright (c) 2010-2012, Intel Corporation +;; Copyright (c) 2013, Intel Corporation ;; All rights reserved. ;; ;; Redistribution and use in source and binary forms, with or without @@ -29,14 +29,12 @@ ;; NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ;; SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -ifelse(LLVM_VERSION, `LLVM_3_0', `', - LLVM_VERSION, `LLVM_3_1', `', +ifelse(LLVM_VERSION, `LLVM_3_1', `', `define(`HAVE_GATHER', `1')') include(`target-avx1-i64x4base.ll') -ifelse(LLVM_VERSION, `LLVM_3_0', `rdrand_decls()', - LLVM_VERSION, `LLVM_3_1', `rdrand_decls()', +ifelse(LLVM_VERSION, `LLVM_3_1', `rdrand_decls()', `rdrand_definition()') ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; @@ -77,10 +75,6 @@ define <4 x i32> @__max_varying_uint32(<4 x i32>, <4 x i32>) nounwind readonly a -ifelse(LLVM_VERSION, `LLVM_3_0', ` -;; nothing to define... -', ` - define(`expand_4to8', ` %$3 = shufflevector <4 x $1> %$2, <4 x $1> undef, <8 x i32> ') @@ -126,7 +120,6 @@ define i16 @__float_to_half_uniform(float %v) nounwind readnone { %r = extractelement <8 x i16> %rv, i32 0 ret i16 %r } -') ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; gather @@ -134,14 +127,7 @@ define i16 @__float_to_half_uniform(float %v) nounwind readnone { declare void @llvm.trap() noreturn nounwind -ifelse(LLVM_VERSION, `LLVM_3_0', ` -gen_gather_factored(i8) -gen_gather_factored(i16) -gen_gather_factored(i32) -gen_gather_factored(float) -gen_gather_factored(i64) -gen_gather_factored(double)', -LLVM_VERSION, `LLVM_3_1', ` +ifelse(LLVM_VERSION, `LLVM_3_1', ` gen_gather_factored(i8) gen_gather_factored(i16) gen_gather_factored(i32)