AVX updates / improvements.
Add optimization patterns to detect and simplify masked loads and stores with the mask all on / all off. Enable AVX for LLVM 3.0 builds (still generally hits bugs / unimplemented stuff on the LLVM side, but it's getting there).
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8
main.cpp
8
main.cpp
@@ -91,7 +91,11 @@ static void usage(int ret) {
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printf(" disable-gather-scatter-flattening\tDisable flattening when all lanes are on\n");
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printf(" disable-uniform-memory-optimizations\tDisable uniform-based coherent memory access\n");
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printf(" disable-masked-store-optimizations\tDisable lowering to regular stores when possible\n");
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#if defined(LLVM_3_0) || defined(LLVM_3_0svn)
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printf(" [--target={sse2,sse4,sse4x2,avx}] Select target ISA (SSE4 is default unless compiling for atom; then SSE2 is.)\n");
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#else
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printf(" [--target={sse2,sse4,sse4x2}] Select target ISA (SSE4 is default unless compiling for atom; then SSE2 is.)\n");
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#endif // LLVM 3.0
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printf(" [--version]\t\t\t\tPrint ispc version\n");
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printf(" [--woff]\t\t\t\tDisable warnings\n");
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printf(" [--wno-perf]\t\t\tDon't issue warnings related to performance-related issues\n");
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@@ -118,13 +122,13 @@ static void lDoTarget(const char *target) {
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g->target.nativeVectorWidth = 4;
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g->target.vectorWidth = 8;
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}
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#if 0
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#if defined(LLVM_3_0) || defined(LLVM_3_0svn)
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else if (!strcasecmp(target, "avx")) {
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g->target.isa = Target::AVX;
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g->target.nativeVectorWidth = 8;
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g->target.vectorWidth = 8;
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}
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#endif
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#endif // LLVM 3.0
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else
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usage(1);
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}
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