Merge pull request #1027 from dbabokin/osxsave
Adding check for OSXSAVE before checking xgetbv in cpu detection code.
This commit is contained in:
@@ -95,7 +95,8 @@
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;;
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;;
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;; // NOTE: the values returned below must be the same as the
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;; // NOTE: the values returned below must be the same as the
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;; // corresponding enumerant values in Target::ISA.
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;; // corresponding enumerant values in Target::ISA.
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;; if ((info2[1] & (1 << 5)) != 0 && // AVX2
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;; if ((info[2] & (1 << 27)) != 0 && // OSXSAVE
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;; (info2[1] & (1 << 5)) != 0 && // AVX2
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;; (info2[1] & (1 << 16)) != 0 && // AVX512 F
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;; (info2[1] & (1 << 16)) != 0 && // AVX512 F
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;; __os_has_avx512_support()) {
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;; __os_has_avx512_support()) {
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;; // We need to verify that AVX2 is also available,
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;; // We need to verify that AVX2 is also available,
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@@ -117,7 +118,8 @@
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;; // or whatever is available in the machine.
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;; // or whatever is available in the machine.
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;; }
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;; }
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;;
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;;
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;; if ((info[2] & (1 << 28)) != 0 &&
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;; if ((info[2] & (1 << 27)) != 0 && // OSXSAVE
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;; (info[2] & (1 << 28)) != 0 &&
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;; __os_has_avx_support()) {
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;; __os_has_avx_support()) {
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;; if ((info[2] & (1 << 29)) != 0 && // F16C
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;; if ((info[2] & (1 << 29)) != 0 && // F16C
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;; (info[2] & (1 << 30)) != 0) { // RDRAND
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;; (info[2] & (1 << 30)) != 0) { // RDRAND
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@@ -158,67 +160,72 @@ entry:
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%asmresult5.i = extractvalue { i32, i32, i32, i32 } %0, 2
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%asmresult5.i = extractvalue { i32, i32, i32, i32 } %0, 2
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%asmresult6.i = extractvalue { i32, i32, i32, i32 } %0, 3
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%asmresult6.i = extractvalue { i32, i32, i32, i32 } %0, 3
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%1 = tail call { i32, i32, i32, i32 } asm sideeffect "xchg$(l$)\09$(%$)ebx, $1\0A\09cpuid\0A\09xchg$(l$)\09$(%$)ebx, $1\0A\09", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 7, i32 0) nounwind
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%1 = tail call { i32, i32, i32, i32 } asm sideeffect "xchg$(l$)\09$(%$)ebx, $1\0A\09cpuid\0A\09xchg$(l$)\09$(%$)ebx, $1\0A\09", "={ax},=r,={cx},={dx},0,2,~{dirflag},~{fpsr},~{flags}"(i32 7, i32 0) nounwind
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%asmresult4.i78 = extractvalue { i32, i32, i32, i32 } %1, 1
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%asmresult4.i87 = extractvalue { i32, i32, i32, i32 } %1, 1
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%2 = and i32 %asmresult4.i78, 65568
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%and = and i32 %asmresult5.i, 134217728
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%cmp = icmp eq i32 %and, 0
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br i1 %cmp, label %if.else65, label %land.lhs.true
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land.lhs.true: ; preds = %entry
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%2 = and i32 %asmresult4.i87, 65568
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%3 = icmp eq i32 %2, 65568
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%3 = icmp eq i32 %2, 65568
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br i1 %3, label %land.lhs.true5, label %if.end35
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br i1 %3, label %land.lhs.true9, label %if.end39
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land.lhs.true5: ; preds = %entry
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land.lhs.true9: ; preds = %land.lhs.true
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%4 = tail call { i32, i32 } asm sideeffect ".byte 0x0f, 0x01, 0xd0", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 0) nounwind
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%4 = tail call { i32, i32 } asm sideeffect ".byte 0x0f, 0x01, 0xd0", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 0) nounwind
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%asmresult.i81 = extractvalue { i32, i32 } %4, 0
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%asmresult.i90 = extractvalue { i32, i32 } %4, 0
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%and.i = and i32 %asmresult.i81, 230
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%and.i = and i32 %asmresult.i90, 230
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%cmp.i = icmp eq i32 %and.i, 230
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%cmp.i = icmp eq i32 %and.i, 230
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br i1 %cmp.i, label %if.then, label %if.end35
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br i1 %cmp.i, label %if.then, label %if.end39
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if.then: ; preds = %land.lhs.true5
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if.then: ; preds = %land.lhs.true9
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%5 = and i32 %asmresult4.i78, -805175296
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%5 = and i32 %asmresult4.i87, -805175296
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%6 = icmp eq i32 %5, -805175296
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%6 = icmp eq i32 %5, -805175296
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br i1 %6, label %return, label %if.else
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br i1 %6, label %return, label %if.else
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if.else: ; preds = %if.then
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if.else: ; preds = %if.then
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%7 = and i32 %asmresult4.i78, 469762048
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%7 = and i32 %asmresult4.i87, 469762048
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%8 = icmp eq i32 %7, 469762048
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%8 = icmp eq i32 %7, 469762048
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br i1 %8, label %return, label %if.end35
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br i1 %8, label %return, label %if.end39
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if.end35: ; preds = %if.else, %land.lhs.true5, %entry
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if.end39: ; preds = %if.else, %land.lhs.true9, %land.lhs.true
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%and37 = and i32 %asmresult5.i, 268435456
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%9 = and i32 %asmresult5.i, 402653184
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%cmp38 = icmp eq i32 %and37, 0
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%10 = icmp eq i32 %9, 402653184
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br i1 %cmp38, label %if.else57, label %land.lhs.true39
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br i1 %10, label %land.lhs.true47, label %if.else65
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land.lhs.true39: ; preds = %if.end35
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land.lhs.true47: ; preds = %if.end39
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%9 = tail call { i32, i32 } asm sideeffect ".byte 0x0f, 0x01, 0xd0", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 0) nounwind
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%11 = tail call { i32, i32 } asm sideeffect ".byte 0x0f, 0x01, 0xd0", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 0) nounwind
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%asmresult.i82 = extractvalue { i32, i32 } %9, 0
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%asmresult.i91 = extractvalue { i32, i32 } %11, 0
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%and.i83 = and i32 %asmresult.i82, 6
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%and.i92 = and i32 %asmresult.i91, 6
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%cmp.i84 = icmp eq i32 %and.i83, 6
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%cmp.i93 = icmp eq i32 %and.i92, 6
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br i1 %cmp.i84, label %if.then42, label %if.else57
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br i1 %cmp.i93, label %if.then50, label %if.else65
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if.then42: ; preds = %land.lhs.true39
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if.then50: ; preds = %land.lhs.true47
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%10 = and i32 %asmresult5.i, 1610612736
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%12 = and i32 %asmresult5.i, 1610612736
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%11 = icmp eq i32 %10, 1610612736
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%13 = icmp eq i32 %12, 1610612736
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br i1 %11, label %if.then50, label %return
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br i1 %13, label %if.then58, label %return
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if.then50: ; preds = %if.then42
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if.then58: ; preds = %if.then50
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%and = lshr i32 %asmresult4.i78, 5
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%and60 = lshr i32 %asmresult4.i87, 5
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%12 = and i32 %and, 1
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%14 = and i32 %and60, 1
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%13 = add nuw nsw i32 %12, 3
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%15 = add i32 %14, 3
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br label %return
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br label %return
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if.else57: ; preds = %land.lhs.true39, %if.end35
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if.else65: ; preds = %land.lhs.true47, %if.end39, %entry
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%and59 = and i32 %asmresult5.i, 524288
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%and67 = and i32 %asmresult5.i, 524288
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%cmp60 = icmp eq i32 %and59, 0
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%cmp68 = icmp eq i32 %and67, 0
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br i1 %cmp60, label %if.else62, label %return
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br i1 %cmp68, label %if.else70, label %return
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if.else62: ; preds = %if.else57
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if.else70: ; preds = %if.else65
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%and64 = and i32 %asmresult6.i, 67108864
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%and72 = and i32 %asmresult6.i, 67108864
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%cmp65 = icmp eq i32 %and64, 0
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%cmp73 = icmp eq i32 %and72, 0
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br i1 %cmp65, label %if.else67, label %return
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br i1 %cmp73, label %if.else75, label %return
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if.else67: ; preds = %if.else62
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if.else75: ; preds = %if.else70
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tail call void @abort() #3
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tail call void @abort() noreturn nounwind
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unreachable
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unreachable
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return: ; preds = %if.else62, %if.else57, %if.then50, %if.then42, %if.else, %if.then
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return: ; preds = %if.else70, %if.else65, %if.then58, %if.then50, %if.else, %if.then
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%retval.0 = phi i32 [ 6, %if.then ], [ 5, %if.else ], [ %13, %if.then50 ], [ 2, %if.then42 ], [ 1, %if.else57 ], [ 0, %if.else62 ]
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%retval.0 = phi i32 [ 6, %if.then ], [ 5, %if.else ], [ %15, %if.then58 ], [ 2, %if.then50 ], [ 1, %if.else65 ], [ 0, %if.else70 ]
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ret i32 %retval.0
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ret i32 %retval.0
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}
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}
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@@ -109,7 +109,8 @@ lGetSystemISA() {
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// Call cpuid with eax=7, ecx=0
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// Call cpuid with eax=7, ecx=0
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__cpuidex(info2, 7, 0);
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__cpuidex(info2, 7, 0);
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if ((info2[1] & (1 << 5)) != 0 && // AVX2
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if ((info[2] & (1 << 27)) != 0 && // OSXSAVE
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(info2[1] & (1 << 5)) != 0 && // AVX2
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(info2[1] & (1 << 16)) != 0 && // AVX512 F
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(info2[1] & (1 << 16)) != 0 && // AVX512 F
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__os_has_avx512_support()) {
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__os_has_avx512_support()) {
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// We need to verify that AVX2 is also available,
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// We need to verify that AVX2 is also available,
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@@ -131,7 +132,8 @@ lGetSystemISA() {
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// or whatever is available in the machine.
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// or whatever is available in the machine.
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}
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}
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if ((info[2] & (1 << 28)) != 0 &&
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if ((info[2] & (1 << 27)) != 0 && // OSXSAVE
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(info[2] & (1 << 28)) != 0 &&
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__os_has_avx_support()) { // AVX
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__os_has_avx_support()) { // AVX
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// AVX1 for sure....
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// AVX1 for sure....
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// Ivy Bridge?
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// Ivy Bridge?
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6
ispc.cpp
6
ispc.cpp
@@ -153,7 +153,8 @@ lGetSystemISA() {
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// Call cpuid with eax=7, ecx=0
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// Call cpuid with eax=7, ecx=0
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__cpuidex(info2, 7, 0);
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__cpuidex(info2, 7, 0);
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if ((info2[1] & (1 << 5)) != 0 && // AVX2
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if ((info[2] & (1 << 27)) != 0 && // OSXSAVE
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(info2[1] & (1 << 5)) != 0 && // AVX2
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(info2[1] & (1 << 16)) != 0 && // AVX512 F
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(info2[1] & (1 << 16)) != 0 && // AVX512 F
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__os_has_avx512_support()) {
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__os_has_avx512_support()) {
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// We need to verify that AVX2 is also available,
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// We need to verify that AVX2 is also available,
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@@ -175,7 +176,8 @@ lGetSystemISA() {
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// or whatever is available in the machine.
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// or whatever is available in the machine.
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}
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}
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if ((info[2] & (1 << 28)) != 0 &&
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if ((info[2] & (1 << 27)) != 0 && // OSXSAVE
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(info[2] & (1 << 28)) != 0 &&
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__os_has_avx_support()) { // AVX
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__os_has_avx_support()) { // AVX
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// AVX1 for sure....
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// AVX1 for sure....
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// Ivy Bridge?
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// Ivy Bridge?
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