AVX bugfixes
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@@ -58,7 +58,7 @@ define internal float @__rcp_uniform_float(float) nounwind readonly alwaysinline
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; rounding floats
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declare <4 x float> @llvm.x86.sse.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone
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declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone
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define internal float @__round_uniform_float(float) nounwind readonly alwaysinline {
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; roundss, round mode nearest 0b00 | don't signal precision exceptions 0b1000 = 8
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@@ -78,7 +78,7 @@ define internal float @__round_uniform_float(float) nounwind readonly alwaysinli
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; It doesn't matter what we pass as a, since we only need the r0 value
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; here. So we pass the same register for both.
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%xi = insertelement <4 x float> undef, float %0, i32 0
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%xr = call <4 x float> @llvm.x86.sse.round.ss(<4 x float> %xi, <4 x float> %xi, i32 8)
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%xr = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %xi, <4 x float> %xi, i32 8)
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%rs = extractelement <4 x float> %xr, i32 0
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ret float %rs
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}
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@@ -87,7 +87,7 @@ define internal float @__floor_uniform_float(float) nounwind readonly alwaysinli
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; see above for round_ss instrinsic discussion...
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%xi = insertelement <4 x float> undef, float %0, i32 0
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; roundps, round down 0b01 | don't signal precision exceptions 0b1001 = 9
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%xr = call <4 x float> @llvm.x86.sse.round.ss(<4 x float> %xi, <4 x float> %xi, i32 9)
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%xr = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %xi, <4 x float> %xi, i32 9)
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%rs = extractelement <4 x float> %xr, i32 0
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ret float %rs
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}
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@@ -96,7 +96,7 @@ define internal float @__ceil_uniform_float(float) nounwind readonly alwaysinlin
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; see above for round_ss instrinsic discussion...
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%xi = insertelement <4 x float> undef, float %0, i32 0
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; roundps, round up 0b10 | don't signal precision exceptions 0b1010 = 10
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%xr = call <4 x float> @llvm.x86.sse.round.ss(<4 x float> %xi, <4 x float> %xi, i32 10)
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%xr = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %xi, <4 x float> %xi, i32 10)
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%rs = extractelement <4 x float> %xr, i32 0
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ret float %rs
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}
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